XA3S1400A XILINX [Xilinx, Inc], XA3S1400A Datasheet - Page 4

• Manufacturer Part Number: XA3S1400A
• Description: XA Spartan-3A Automotive FPGA Family Data Sheet
• Manufacturer: XILINX [Xilinx, Inc]

I/O Capabilities
The XA Spartan-3A FPGA SelectIO interface supports
many popular single-ended and differential standards.
Table 2
number of differential I/O pairs available for each
device/package combination. Some of the user I/Os are
unidirectional input-only pins as indicated in
XA Spartan-3A FPGAs support the following single-ended
standards:
•
•
•
•
Table 2: Available User I/Os and Differential (Diff) I/O Pairs
4
Notes:
1.
XA3S200A
XA3S400A
XA3S700A
XA3S1400A
3.3V low-voltage TTL (LVTTL)
Low-voltage CMOS (LVCMOS) at 3.3V, 2.5V, 1.8V,
1.5V, or 1.2V
3.3V PCI at 33 MHz
HSTL I, II, and III at 1.5V and 1.8V, commonly used in
memory applications
The number shown in bold indicates the maximum number of I/O and input-only
pins. The number shown in (italics) indicates the number of input-only pins. The
differential (Diff) input-only pin count includes both differential pairs on input-only
pins and differential pairs on I/O pins within I/O banks that are restricted to
differential inputs.
Device
shows the number of user I/Os as well as the
User
195
(35)
195
(35)
-
-
FTG256
(50)
(50)
Diff
90
90
-
-
User
(63)
(63)
311
311
-
-
FGG400
Table
Diff
(78)
(78)
142
142
2.
-
-
www.xilinx.com
User
(84)
(87)
372
375
-
-
FGG484
•
XA Spartan-3A FPGAs support the following differential
standards:
•
•
•
•
•
SSTL I and II at 1.8V, 2.5V, and 3.3V, commonly used
for memory applications
LVDS, mini-LVDS, RSDS, and PPDS I/O at 2.5V or
3.3V
Bus LVDS I/O at 2.5V
TMDS I/O at 3.3V
Differential HSTL and SSTL I/O
LVPECL inputs at 2.5V or 3.3V
Diff
165
(93)
165
(93)
-
-
DS681 (v1.1) February 3, 2009
Product Specification
R