SL811ST CYPRESS [Cypress Semiconductor], SL811ST Datasheet - Page 19
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SL811ST
Manufacturer Part Number
SL811ST
Description
SL811S/T USB Dual Speed Slave Controller
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
1.SL811ST.pdf
(27 pages)
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Document #: 38-08009 Rev. **
Pin No.
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
Pin Type
VDD1
BIDIR
BIDIR
BIDIR
BIDIR
BIDIR
BIDIR
BIDIR
BIDIR
VDD1
GND
GND
OUT
OUT
OUT
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
IN
IN
IN
IN
IN
Pin Name
3.3 VDC
3.3 VDC
CLK/X1
nDACK
INTRQ
nDRQ
nRST
GND
GND
nRD
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
X2
D0
D1
D2
D3
D4
D5
D6
D7
A0
NC
NC
NC
SL811ST Device VDD Power.
12/48 MHz Clock or External Crystal X1 connection.
External Crystal X2 connection.
SL811ST Device active low reset input.
Active High Interrupt Request output to external controller.
SL811ST Device Ground.
Data 0. Microprocessor Data/(Address) Bus.
NC
NC
NC
NC
NC
Data 1. Microprocessor Data/(Address) Bus.
Data 2. Microprocessor Data/(Address) Bus.
Data 3. Microprocessor Data/(Address) Bus.
SL811ST Device Ground.
Data 4. Microprocessor Data/(Address) Bus.
Data 5. Microprocessor Data/(Address) Bus.
Data 6. Microprocessor Data/(Address) Bus.
NC
NC
NC
NC
NC
Data 7. Microprocessor Data/(Address) Bus.
NC.
SL811ST Device VDD Power.
Buffer or Register.
DMA Acknowledge. An active low input used to interface to an external DMA
controller.
DMA Request. An active low output used with an external DMA controller. nDRQ
and nDACK form the handshake for DMA data transfers.
Read Strobe Input. An active low input used with nCS to read registers/data
memory.
NC
NC
NC
A0 = ’0’. Selects Addr. Pointer. Reg. Write Only. Note 1 A0 = ’1’. Selects Data
Pin Description
SL811S/T
Page 19 of 27