SL811ST CYPRESS [Cypress Semiconductor], SL811ST Datasheet - Page 9

• Manufacturer Part Number: SL811ST
• Description: SL811S/T USB Dual Speed Slave Controller
• Manufacturer: CYPRESS [Cypress Semiconductor]

4.10
SL811S/T has a built-in SOF (Start of Frame) Detect Interrupt signal that can be monitored by an external microprocessor. The
SOF indicates continuous USB activity and is transmitted by the USB Host every 1 ms (millisecond). The selected processor can
use its timer to track non-SOFs or non-USB activity, and thus start the power Suspend sequence. The peripheral requires
additional hardware to enable power shutdown to the SL811S/T, the removal of 3.3V power to USB Data+ line pull-up resistor,
(which signals a disconnect t the USB Host), and to turn-off the clock to the SL811S/T. In Suspend mode, the unit will draw less
than 40 A (Micro-Amperes).
The SL811S/T can signal a wake-up to the Host USB device, providing the Pull-up resistor remains powered during the Suspend
time. A register control bit allows the SL811S/T to output a ‘K’ State on the USB to signal the Host. See Force Function description
in the Control Register Section. If the pull-up is powered down during Suspend, restoring power to the pull-up will signal a device
connect to the USB host.
4.11
Operation and control of the SL811S/T is managed through the internal registers. A portion of the internal RAM is devoted to the
register space and access is through the microprocessor interface. The registers provide control and status information for
transactions on the USB, microprocessor interface, DMA and interrupts.
4.12
The SL811S/T supports auto increment mode to reduce read and write memory cycles. In this mode, the microcontroller needs
to set up the address only once. Whenever any subsequent DATA is accessed, the internal address counter will advance to the
next address location.
Once the address of the starting location has been set, the write operations will write the data bytes in consecutive locations. For
example, assume the value Index1 was written into the Address register of SL811S/T during the Address cycle (with the A0 input
set low). The write operations in the data cycle (with A0 input set High) will write the data bytes into the sequential internal memory
locations Index1, Index1 + 1, Index1 + 2 and so on. The Auto increment mode also works on read operations from SL811S/T
operations. After setting the address of the starting location once, the read operations will read the subsequent internal memory
locations.
For example
Document #: 38-08009 Rev. **
Write 0x10 to SL811S/T in address cycle (A0 is set low)
Write 0x55 to SL811S/T in data cycle (A0 is set high) -> write 0x55 to location 0x10
Write 0xaa to SL811S/T in data cycle (A0 is set high) -> write 0xaa to location 0x11
Write 0xbb to SL811S/T in data cycle (A0 is set high) -> write 0xbb to location 0x12
Power Resume and Suspend Mode
SL811S/T Registers
Auto Address Increment Mode
X1
22 pF
Cin
Figure 4-2. 12-MHz Crystal Circuit.
1 2MHz , series, 20-pF load
Rf
1M
X1
X2
22 pF
Rs
100
Cout
SL811S/T
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