PIC12F1822 MICROCHIP [Microchip Technology], PIC12F1822 Datasheet - Page 270

• Manufacturer Part Number: PIC12F1822
• Description: 8/14-Pin Flash Microcontrollers with nanoWatt XLP Technology
• Manufacturer: MICROCHIP [Microchip Technology]

PIC12F/LF1822/16F/LF1823
24.6.13.2
During a Repeated Start condition, a bus collision
occurs if:
a)
b)
When the user releases SDA and the pin is allowed to
float high, the BRG is loaded with SSP1ADD and
counts down to zero. The SCL pin is then deasserted
and when sampled high, the SDA pin is sampled.
FIGURE 24-36:
FIGURE 24-37:
DS41413A-page 270
A low level is sampled on SDA when SCL goes
from low level to high level.
SCL goes low before SDA is asserted low,
indicating that another master is attempting to
transmit a data ‘1’.
SDA
SCL
BCL1IF
RSEN
S
SSP1IF
SDA
SCL
RSEN
BCL1IF
S
SSP1IF
Bus Collision During a Repeated
Start Condition
BUS COLLISION DURING A REPEATED START CONDITION (CASE 1)
BUS COLLISION DURING REPEATED START CONDITION (CASE 2)
SCL goes low before SDA,
set BCL1IF. Release SDA and SCL.
Preliminary
T
BRG
Sample SDA when SCL goes high.
If SDA = 0, set BCL1IF and release SDA and SCL.
If SDA is low, a bus collision has occurred (i.e., another
master is attempting to transmit a data ‘0’, Figure 24-35).
If SDA is sampled high, the BRG is reloaded and begins
counting. If SDA goes from high-to-low before the BRG
times out, no bus collision occurs because no two
masters can assert SDA at exactly the same time.
If SCL goes from high-to-low before the BRG times out
and SDA has not already been asserted, a bus collision
occurs. In this case, another master is attempting to
transmit a data ‘1’ during the Repeated Start condition,
see Figure 24-36.
If, at the end of the BRG time-out, both SCL and SDA
are still high, the SDA pin is driven low and the BRG is
reloaded and begins counting. At the end of the count,
regardless of the status of the SCL pin, the SCL pin is
driven low and the Repeated Start condition is
complete.
T
Cleared by software
 2010 Microchip Technology Inc.
BRG
Interrupt cleared
by software
’0’
’0’
’0’