NG80386SX-33 AMD [Advanced Micro Devices], NG80386SX-33 Datasheet - Page 14

• Manufacturer Part Number: NG80386SX-33
• Description: High-Performance, Low-Power, Embedded Microprocessors
• Manufacturer: AMD [Advanced Micro Devices]

SWITCHING CHARACTERISTICS
The switching characteristics given consist of output
delays, input setup requirements, and input hold re-
quirements. All switching characteristics are relative to
the CLK2 rising edge crossing the 2.0-V level.
Switching characteristic measurement is defined in
Figure 2. Inputs must be driven to the voltage levels in-
dicated by Figure 2 when switching characteristics are
measured. Output delays are specified with minimum
and maximum limits measured, as shown. The mini-
mum delay times are hold times provided to external
circuitry. Input setup and hold times are specified as
minimums, defining the smallest acceptable sampling
14
Notes:
1. Input waveforms have tr
2. On Am386SX/SXL, V
3. * = On Am386SXLV only.
(NA, INTR, NMI, SMI*)
FLT, ERROR, BUSY,
(A23–A1, BHE, BLE,
W/R, LOCK, HLDA,
IIBEN*, SMIRDY*)
PEREQ, D15–D0,
Legend: A–Maximum Output Delay Characteristic
(READY, HOLD,
ADS, M/IO, D/C,
(D15–D0, SMI*)
SMIADS*)
B–Minimum Output Delay Characteristic
C–Minimum Input Setup Characteristic
D–Minimum Input Hold Characteristic
Figure 2. Drive Levels and Measurement Points for Switching Characteristics
CLK2
T
= 1.5; on Am386SXLV, V
2.0 ns from 0.8 V–2.0 V (on Am386SXLV only).
2 V
Output n
Am386SX/SXL/SXLV Microprocessors Data Sheet
Valid
B
V
T
Min
A
T
= 1.0 V for V
1
F I N A L
Max
V
V
window. Within the sampling window, a synchronous
input signal must be stable for correct operation.
Outputs ADS, W/R, D/C, M/IO, LOCK, BHE, BLE,
A23–A1, HLDA, and SMIADS* only change at the be-
ginning of phase one. D15–D0 and SMI* write cycles
only change at the beginning of phase two. The
READY, HOLD, BUSY, ERROR, PEREQ, FLT, D15–
D0, IIBEN*, and SMIRDY* read cycles inputs are sam-
pled at the beginning of phase one. The NA, INTR,
NMI, and SMI* inputs are sampled at the beginning of
phase two.
* – On Am386SXLV only; NC on Am386SX/SXL
T
T
CC
C
Output n+1
Output n
Valid
Valid
3.6 V and 1.5 V for V
Valid
Input
Tx
B
V
D
T
V
T
Min
A
CC
2
> 3.6 V.
Max
V
T
V
C
T
Output n+1
Valid
Input
Valid
16305C–003
D
V
T