NG80386SX-33 AMD [Advanced Micro Devices], NG80386SX-33 Datasheet - Page 29

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NG80386SX-33

Manufacturer Part Number
NG80386SX-33
Description
High-Performance, Low-Power, Embedded Microprocessors
Manufacturer
AMD [Advanced Micro Devices]
Datasheet

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PACKAGE THERMAL SPECIFICATIONS
The Am386SX/SXL/SXLV processors are specified for
operation when T
the range of 0 C to +100 C for commercial parts, and
–40°C to +100°C for industrial parts. T
sured in any environment to determine whether the
Am386SX/SXL/SXLV processors are within the speci-
fied operating range. The case temperature should be
measured at the center of the top surface opposite the
pins.
The ambient temperature (T
T
calculated from
ELECTRICAL SPECIFICATIONS
The Am386SX/SXL/SXLV CPU has modest power re-
quirements. However, its high clock frequency and 47
output buffers (address, data, control, and HLDA) can
cause power surges as multiple output buffers drive
new signal levels simultaneously. For clean on-chip
power distribution at high frequency, 14 V
18 V
Am386SX/SXL/SXLV CPU.
Power and ground connections must be made to all ex-
ternal V
CPU. On the circuit board, all V
nected on a V
nected on a GND plane.
Power Decoupling Recommendations
Liberal decoupling capacitors should be placed near
the Am386SX/SXL/SXLV CPU. The Am386SX/SXL/
SXLV CPU driving its 24-bit address bus and 16-bit
data bus at high frequencies can cause transient power
surges, particularly when driving large capacitive
loads. Low inductance capacitors and interconnects
are recommended for best high frequency electrical
performance. Inductance can be reduced by shorten-
ing circuit board traces between the Am386SX/SXL/
SXLV CPU and decoupling capacitors as much as pos-
sible.
Resistor Recommendations
The ERROR, FLT, and BUSY inputs have internal pull-
up resistors of approximately 20 Kohms, and the
CASE
SS
is not violated. The ambient temperature can be
CC
pins separately feed functional units of the
Pin
16
26
and V
CC
JC
CASE
SS
plane, and V
and
pins of the Am386SX/SXL/SXLV
(the case temperature) is within
JA
and from these equations:
A
) is guaranteed as long as
Signal
LOCK
Table 1. Recommended Resistor Pull-Ups to V
Am386SX/SXL/SXLV Microprocessors Data Sheet
ADS
SS
CC
pins should be con-
pins should be con-
CASE
can be mea-
20 Kohms ± 10%
20 Kohms ± 10%
CC
Pull-Up Value
and
F I N A L
T
T
T
where:
T
P
In the 100-lead PQFP package,
PEREQ input has an internal pull-down resistor of ap-
proximately 20 Kohms, built into the Am386SX/SXL/
SXLV CPU to keep these signals inactive when a
387SX-compatible math coprocessor is not present in
the system (or temporarily removed from its socket).
In typical designs, the external pull-up resistors shown
in Table 1 are recommended. However, a particular de-
sign may have reason to adjust the resistor values rec-
ommended here, or alter the use of pull-up resistors in
other ways.
Other Connection Recommendations
For reliable operation, always connect unused inputs to
an appropriate signal level. NC pins should always re-
main unconnected. Connection of NC pins to V
V
bility with future steppings of the Am386SX/SXL/SXLV
CPU.
Particularly when not using the interrupts or bus hold
(as when first prototyping), prevent any chance of spu-
rious activity by connecting these associated inputs to
GND:
Pin
40
38
4
If not using address pipelining, connect pin 6 (NA)
through a pull-up in the range of 20 Kohms to V
JC
J
A
CASE
J
SS
, T
= T
= T
,
A
will result in component malfunction or incompati-
JA
CASE
, T
J
= T
Lightly pull ADS inactive during Am386SX/SXL/SXLV
CPU Hold Acknowledge states.
Lightly pull LOCK inactive during Am386SX/SXL/
SXLV CPU Hold Acknowledge states.
– P •
CASE
Signal
INTR
NMI
HOLD
A
+ P •
+ P • [
JA
= Junction, Ambient, and Case Temperature
= Junction-to-Case and Junction-to-Ambient
= Maximum Power Consumption
JC
Thermal Resistance, respectively
JA
CC
JC
]
Purpose
JA
=45.0 and
JC
CC
=11.0.
CC
.
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