MPC8533E_11 FREESCALE [Freescale Semiconductor, Inc], MPC8533E_11 Datasheet - Page 26

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MPC8533E_11

Manufacturer Part Number
MPC8533E_11
Description
MPC8533E PowerQUICC III Integrated Processor Hardware Specifications
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Enhanced Three-Speed Ethernet (eTSEC), MII Management
Timing diagrams for FIFO appear in
8.3.2
This section describes the GMII transmit and receive AC timing specifications.
8.3.2.1
Table 25
26
At recommended operating conditions with L/TVDD of 3.3 V ± 5% or 2.5 V ± 5%
At recommended operating conditions with L/TVDD of 3.3 V ± 5% or 2.5 V ± 5%
Rise time RX_CLK (20%–80%)
Fall time RX_CLK (80%–20%)
RXD[7:0], RX_DV, RX_ER setup time to RX_CLK
RX_CLK to RXD[7:0], RX_DV, RX_ER hold time
GTX_CLK clock period
GTX_CLK to GMII data TXD[7:0], TX_ER, TX_EN delay
GTX_CLK data clock rise time (20%-80%)
provides the GMII transmit AC timing specifications.
GTX_CLK
RXD[7:0]
RX_CLK
TXD[7:0]
RX_ER
GMII AC Timing Specifications
RX_DV
Parameter/Condition
TX_EN
TX_ER
GMII Transmit AC Timing Specifications
Parameter/Condition
MPC8533E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
Table 24. FIFO Mode Receive AC Timing Specification (continued)
t
t
FIRH
FITH
Table 25. GMII Transmit AC Timing Specifications
Figure 7. FIFO Transmit AC Timing Diagram
Figure 8. FIFO Receive AC Timing Diagram
t
t
t
FIR
FIRDV
FIT
t
FITDV
Figure 7
Valid Data
Symbol
and
t
t
t
FIRDX
t
FIRDV
FIRR
FIRF
Symbol
Figure
t
GTKHDX
t
t
GTXR
GTX
1
8.
t
FITDX
Min
1.5
0.5
t
FIRDX
Min
0.2
Typ
t
t
FITF
FIRF
Typ
8.0
Max
0.75
0.75
Max
5.0
1.0
Freescale Semiconductor
t
FITR
t
FIRR
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
Notes
Notes
2

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