MC68HC11F1CFN5 MOTOROLA [Motorola, Inc], MC68HC11F1CFN5 Datasheet - Page 54

• Manufacturer Part Number: MC68HC11F1CFN5
• Description: Technical Summary 8-Bit Microcontroller
• Manufacturer: MOTOROLA [Motorola, Inc]

11.1 Input Pins
11.2 Conversion Sequence
54
MOTOROLA
E CLOCK
Port E pins can also be used as digital inputs. Reads of port E pins are not recommended during the
sample portion of an A/D conversion cycle, when the gate signal to the N-channel input gate is on. Be-
cause no P-channel devices are directly connected to either input pins or reference voltage pins, volt-
ages above V
maximum ratings. Figure 15 is a functional diagram of an input pin.
A/D converter operations are performed in sequences of four conversions each. A conversion sequence
can be repeated continuously or stop after one iteration. The conversion complete flag (CCF) is set after
the fourth conversion in a sequence to show the availability of data in the result registers. Figure 16
shows the timing of a typical sequence. Synchronization is referenced to the system E clock.
0
ANALOG
INPUT
* THIS ANALOG SWITCH IS CLOSED ONLY DURING THE 12-CYCLE SAMPLE TIME.
CHANNEL, UPDATE
PIN
CONVERT FIRST
SAMPLE ANALOG INPUT
ADR1
Figure 15 Electrical Model of an Analog Input Pin (Sample Mode)
DD
12 E CYCLES
PROTECTION
do not cause a latchup problem, although current should be limited according to
< 2 pF
DEVICE
INPUT
32
+ ~20V
– ~0.7V
CONVERT SECOND
CHANNEL, UPDATE
Figure 16 A/D Conversion Sequence
ADR2
CYCLES
MSB
4
DUMMY N-CHANNEL
SUCCESSIVE APPROXIMATION SEQUENCE
+ ~12V
– ~0.7V
OUTPUT DEVICE
BIT 6
CYC
64
2
CHANNEL, UPDATE
BIT 5
CYC
CONVERT THIRD
2
BIT 4
CYC
ADR3
2
BIT 3
CYC
2
BIT 2
CYC
DIFFUSION/POLY
2
JUNCTION
LEAKAGE
96
400 nA
COUPLER
BIT 1
CYC
CONVERT FOURTH
CHANNEL, UPDATE
2
4 K
CYC
LSB
ADR4
2
CYC
END
~ 20 pF
2
MC68HC11F1/FC0
*
MC68HC11FTS/D
128 — E CYCLES
CAPACITANCE
V
RL
DAC