XC73144-12 XILINX [Xilinx, Inc], XC73144-12 Datasheet - Page 7

• Manufacturer Part Number: XC73144-12
• Description: 144-Macrocell CMOS EPLD
• Manufacturer: XILINX [Xilinx, Inc]

I/O Block External AC Characteristics
Internal AC Characteristics
Note: 2. Specifications account for logic paths that use the maximum number of available product terms for a given Macrocell.
Figure 3. AC Load Circuit
XC73144 Programmable Logic Device
Symbol Parameter
f
t
t
t
t
t
t
t
Symbol Parameter
t
t
t
t
t
t
t
Preliminary
IN
SUIN
HIN
COIN
CESUIN
CEHIN
CWHIN
CWLIN
IN
FOUT
OUT
UIM
FOE
FOD
FCLKI
Max pipeline frequency (input register to FFB or
FB register)
Input register/latch setup time before FCLK
Input register/latch hold time after FCLK
FCLK
Clock enable setup time before FCLK
Clock enable hold time after FCLK
FCLK pulse width high time
FCLK pulse width low time
Input pad and buffer delay
FFB output buffer and pad delay
FB output buffer and pad delay
Universal Interconnect Matrix delay
FOE input to output valid
FOE input to output disable
Fast clock buffer delay
to input register/latch output
2
Output Type
FO
Device Output
Device Input
Rise and Fall
Times < 3 ns
V
5.0 V
3.3 V
CCIO
V
TEST
V
5.0 V
3.3 V
TEST
R
R
2
1
2-71
83.3
XC73144-7
Min
XC73144-7
Min
(Com Only)
4.0
5.0
4.0
4.0
(Com Only)
0
0
R
160
260
1
Max
Max Min
2.5
2.5
3.0
4.5
6.0
7.5
7.5
1.5
C
L
R
120
360
62.5
XC73144-10
XC73144-10
Min
2
(Com Only)
(Com Only)
5.0
0
7.0
0
5.0
5.0
Test Point
Max
10.0
10.0
Max
3.5
4.5
6.5
9.0
2.5
3.5
C
35 pF
35 pF
L
X3491
(Com/Ind Only)
(Com/Ind Only)
Min
XC73144-12
55.6
XC73144-12
Min
6.0
0
8.0
0
5.5
5.5
Max
10.0
12.0
12.0
Max
4.0
5.0
8.0
3.0
4.0
Min
XC73144-15
XC73144-15
45.5
10.0
Min
7.0
0
0
6.0
6.0
Max
10.0
12.0
15.0
15.0
Max
5.0
7.0
4.0
5.0
Units
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns