ENC28J60-C/ML MICROCHIP [Microchip Technology], ENC28J60-C/ML Datasheet - Page 67

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ENC28J60-C/ML

Manufacturer Part Number
ENC28J60-C/ML
Description
Stand-Alone Ethernet Controller with SPI Interface
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
REGISTER 12-2:
© 2006 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W-0
INTIE
INTIE: Global INT Interrupt Enable bit
1 = Allow interrupt events to drive the INT pin
0 = Disable all INT pin activity (pin is continuously driven high)
PKTIE: Receive Packet Pending Interrupt Enable bit
1 = Enable receive packet pending interrupt
0 = Disable receive packet pending interrupt
DMAIE: DMA Interrupt Enable bit
1 = Enable DMA interrupt
0 = Disable DMA interrupt
LINKIE: Link Status Change Interrupt Enable bit
1 = Enable link change interrupt from the PHY
0 = Disable link change interrupt
TXIE: Transmit Enable bit
1 = Enable transmit interrupt
0 = Disable transmit interrupt
Reserved: Maintain as ‘0’
TXERIE: Transmit Error Interrupt Enable bit
1 = Enable transmit error interrupt
0 = Disable transmit error interrupt
RXERIE: Receive Error Interrupt Enable bit
1 = Enable receive error interrupt
0 = Disable receive error interrupt
PKTIE
R/W-0
EIE: ETHERNET INTERRUPT ENABLE REGISTER
W = Writable bit
‘1’ = Bit is set
DMAIE
R/W-0
LINKIE
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
TXIE
R/W-0
r
x = Bit is unknown
ENC28J60
TXERIE
R/W-0
DS39662B-page 65
RXERIE
R/W-0
bit 0

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