PIC18F248-E/L MICROCHIP [Microchip Technology], PIC18F248-E/L Datasheet - Page 134
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PIC18F248-E/L
Manufacturer Part Number
PIC18F248-E/L
Description
28/40-Pin High-Performance, Enhanced Flash Microcontrollers with CAN Module
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F248-EL.pdf
(402 pages)
- Current page: 134 of 402
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16.1
Enhanced Capture/Compare/PWM Register 1 (ECCPR1)
is comprised of two 8-bit registers: ECCPR1L (low
byte) and ECCPR1H (high byte). The ECCP1CON
register controls the operation of ECCP1; the additional
registers, ECCPAS and ECCP1DEL, control Enhanced
PWM specific features. All registers are readable and
writable.
Table 16-1 shows the timer resources for the ECCP
module modes. Table 16-2 describes the interactions
of the ECCP module with the standard CCP module.
TABLE 16-2:
TABLE 16-3:
DS41159E-page 132
PIC18FXX8
Conventional CCP Compatible
Dual Output PWM
Quad Output PWM
Legend: x = Don’t care. Shaded cells indicate pin assignments not used by ECCP in a given mode.
Note 1:
ECCP1 Mode
Compare
Capture
Capture
PWM
PWM
PWM
2:
ECCP1 Module
ECCP Mode
In all cases, the appropriate TRISD bits must be cleared to make the corresponding pin an output.
In these modes, the PSP I/O control for PORTD is overridden by P1B, P1C and P1D.
CCP1 Mode
INTERACTION OF CCP1 AND ECCP1 MODULES
PIN ASSIGNMENTS FOR VARIOUS ECCP MODES
(2)
Compare
Compare
Compare
(2)
Capture
Capture
PWM
(1)
TMR1 or TMR3 time base. Time base can be different for each CCP.
TMR1 or TMR3 depending upon which time base is used.
The compare(s) could be configured for the special event trigger which clears TMR1
or TMR3 depending upon which time base is used.
None
None
The compare could be configured for the special event trigger which clears either
The PWMs will have the same frequency and update rate (TMR2 interrupt).
Configuration
ECCP1CON
00xx11xx
10xx11xx
x1xx11xx
ECCP1
RD4
P1A
P1A
In PWM mode, the ECCP module can have up to four
available outputs, depending on which operating mode
is selected. These outputs are multiplexed with PORTD
and the Parallel Slave Port. Both the operating mode
and the output pin assignments are configured by setting
PWM output configuration bits, EPWM1M1:EPWM1M0
(ECCP1CON<7:6>). The specific pin assignments for
the various output modes are shown in Table 16-3.
TABLE 16-1:
Interaction
ECCP1 Mode
Compare
Capture
PWM
PSP<5>
RD<5>,
RD5
P1B
P1B
ECCP1 MODE – TIMER
RESOURCE
© 2006 Microchip Technology Inc.
PSP<6>
PSP<6>
RD<6>,
RD<6>,
RD6
P1C
Timer1 or Timer3
Timer1 or Timer3
Timer Resource
Timer2
PSP<7>
PSP<7>
RD<7>,
RD<7>,
RD7
P1D
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