PIC18F248-E/L MICROCHIP [Microchip Technology], PIC18F248-E/L Datasheet - Page 277
PIC18F248-E/L
Manufacturer Part Number
PIC18F248-E/L
Description
28/40-Pin High-Performance, Enhanced Flash Microcontrollers with CAN Module
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F248-EL.pdf
(402 pages)
- Current page: 277 of 402
- Download datasheet (8Mb)
FIGURE 24-2:
© 2006 Microchip Technology Inc.
(INTCON<1>)
(INTCON<7>)
Note
INSTRUCTION FLOW
Instruction
Instruction
INTF Flag
Executed
GIEH bit
CLKO
Fetched
INT pin
OSC1
1:
2:
3:
4:
PC
(4)
XT, HS or LP Oscillator mode assumed.
GIE = 1 assumed. In this case, after wake-up, the processor jumps to the interrupt routine. If GIE = 0, execution will continue in-line.
T
CLKO is not available in these oscillator modes but shown here for timing reference.
OST
Inst(PC) = Sleep
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1
= 1024 T
Inst(PC – 1)
PC
WAKE-UP FROM SLEEP THROUGH INTERRUPT
OSC
(drawing not to scale). This delay will not occur for RC and EC Oscillator modes.
Inst(PC + 2)
Sleep
PC + 2
Processor in
Sleep
PC + 4
T
OST
(2)
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
Inst(PC + 4)
Inst(PC + 2)
PC + 4
Interrupt Latency
Dummy Cycle
PC + 4
(1,2)
(3)
PIC18FXX8
Dummy Cycle
Inst(0008h)
0008h
DS41159E-page 275
Inst(000Ah)
Inst(0008h)
000Ah
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