MC68HC705T16 MOTOROLA [Motorola, Inc], MC68HC705T16 Datasheet - Page 51

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MC68HC705T16

Manufacturer Part Number
MC68HC705T16
Description
High-density complementary metal oxide semiconductor (HCMOS) microcontroller unit
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
MC68HC05T16
COMPARE REGISTER
Note:
Note:
INTERNAL
OUTPUT COMPARE
OUTPUT COMPARE
CLOCKS
TIMER
Flag and TCMP1, 2
OVERFLOW
FLAG (TOF)
COUNTER
INTERNAL
PROCESSOR
CLOCKS
TIMER
The TOF bit is set at timer state T11 (transition of counter from $FFFF to $0000).
INTERNAL
(16 BIT)
It is cleared by a read of the timer status register during the internal processor
clock high time followed by a read of the counter low register.
TIMER
PROCESSOR
REGISTER
COUNTER
CLOCK
1. The CPU write to the compare registers may take place at any time, but a compare only occurs at
2. The output compare flag is set at the timer state T11 that follows the comparison match ($F547 in
INTERNAL
T00
T01
T10
T11
(16 BIT)
LATCH
the timer state T01. Thus a 4-cycle difference may exist between the write to the compare register
and the actual compare.
this example).
CLOCK
T00
T01
T10
T11
Figure 5-4 Timer State Timing Diagram for Output Compare
$FFFE
$F455
Figure 5-5 Timer State Diagram for Timer Overflow
$FFFF
CPU writes $F457
$F456
TIMERS
Note 1
Note 1
Note 2
$0000
$F457
$F457
$0001
$F458
MOTOROLA
$0002
$F459
TPG
5-9
5

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