MC68HC705T16 MOTOROLA [Motorola, Inc], MC68HC705T16 Datasheet - Page 84

• Manufacturer Part Number: MC68HC705T16
• Description: High-density complementary metal oxide semiconductor (HCMOS) microcontroller unit
• Manufacturer: MOTOROLA [Motorola, Inc]

9
9.5.1
Bits 7 to 4 are control bits and, bits 3 to 0 are status bits.
PLLEN - PLL enable bit
DSCAN - Double/Single scan mode select
DSCAN (double scan) bit is for the control of OSD logic so that the OSD can accommodate
non-interlaced scan TV system by adjusting dot matrix scan output. Users have to determine if the
target TV broadcast system is a double scan system. If DSCAN is set, all horizontal lines in the
character dot matrix will be displayed twice in the same frame. The other feature associated with
horizontal lines that will also be doubled is the RiVP6-RiVP0 field of Row Vertical Position
Registers.
FADE - Display fade enable
The FADE bit controls the sequence of frame display appearance and disappearance. When
FADE bit is set, frame display will gradually appear (fade in) if ON/OFF is set, and gradually
disappear (fade out) if ON/OFF is clear. If FADE bit is clear, OSD display will be turned on or off
instantly.
MOTOROLA
9-14
1 (set)
0 (clear) –
1 (set)
0 (clear) –
1 (set)
0 (clear) –
Address
$1D
Frame Control 1 and Row Count Register
PLLEN
–
–
–
bit 7
PLL enabled for OSD clock source.
PLL disabled.
Double scan mode.
Single scan mode.
Display fade function enabled.
Display fade function disabled.
Table 9-2 Number of Visible Characters Per Row
DSCAN
bit 6
char size
FADE
bit 5
1H x 1V
2H x 2V
3H x 3V
4H x 4V
ON-SCREEN DISPLAY
dot matrix
ON/OFF CDRC3
bit 4
16x16
24
12
8
6
bit 3
CDRC2
bit 2
12x16
32
16
11
8
CDRC1
bit 1
CDRC0
bit 0
0000 0000
on reset
MC68HC05T16
State
TPG