LAN9115_05 SMSC [SMSC Corporation], LAN9115_05 Datasheet - Page 60

• Manufacturer Part Number: LAN9115_05
• Description: Highly Efficient Single- Chip 10/100 Non-PCI Ethernet Controller
• Manufacturer: SMSC [SMSC Corporation]

Revision 1.1 (05-17-05)
3.14.3
29:16
BITS
31
30
15
14
13
12
Reserved. This bit is reserved. Reads 0.
Filtering Fail. When set, this bit indicates that the associated frame failed the address recognizing
filtering.
Packet Length. The size, in bytes, of the corresponding received frame.
Error Status (ES). When set this bit indicates that the MIL has reported an error. This bit is the
Internal logical “or” of bits 11,7,6 and 1.
Reserved. These bits are reserved. Reads 0.
Broadcast Frame. When set, this bit indicates that the received frame has a Broadcast address.
Length Error (LE). When set, this bit indicates that the actual length does not match with the
length/type field of the received frame.
Note 3.16 The LAN9115 host bus interface supports 16-bit bus transfers; internally, all data paths are
RX Status Format
32-bits wide.
transactions.
Host Read
Order
Last
2nd
1st
Figure 3.19 RX Packet Format
Figure 3.19
31
ofs + First Data DWORD
DATASHEET
Optional offset DWORDn
Optional offset DWORD0
Optional Pad DWORD0
Optional Pad DWORDn
Last Data DWORD
describes the host read ordering for pairs of atomic 16-bit
DESCRIPTION
60
Highly Efficient Single-Chip 10/100 Non-PCI Ethernet Controller
.
.
.
.
.
.
.
.
0
SMSC LAN9115
Datasheet