MC68HC711G5 MOTOROLA [Motorola, Inc], MC68HC711G5 Datasheet - Page 94

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MC68HC711G5

Manufacturer Part Number
MC68HC711G5
Description
High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
Receive data or transmit data is the serial data that is transferred to the internal data bus from the
receive data input pin (RXD) or from the internal bus to the transmit data output pin (TXD). The non-
return-to-zero (NRZ) data format shown in Figure 7-3 is used and must meet the following criteria:
1) The idle line is brought to a logic one state prior to transmission/reception of a character.
2) A start bit (logic zero) is used to indicate the start of a frame.
3) The data is transmitted and received least significant bit first.
4) A stop bit (logic one) is used to indicate the end of a frame. A frame consists of a start bit, a
5) A break is defined as the transmission or reception of a low (logic zero) for at least one complete
The MC68HC11G5 receiver logic hardware also supports a receiver wake-up function which is
intended for systems having more than one receiver. With this function a transmitting device directs
messages to an individual receiver or group of receivers by passing addressing information as the
initial byte(s) of each message. The wake-up function allows receivers not addressed to remain in
in a dormant state for the remainder of the unwanted message. This eliminates any further software
overhead to service the remaining characters of the unwanted message and thus improves system
performance.
MOTOROLA
7-4
Frequency
7.3
7.4
Oscillator
character of eight or nine data bits, and a stop bit.
frame time.
Idle Line
DATA FORMAT
RECEIVER WAKE-UP OPERATION
+ 4
SCP0-SCP1
Figure 7-2. Rate Generator Division
SERIAL COMMUNICATIONS INTERFACE
Prescaler
Control
+ N
Start
Figure 7-3. Data Format
0
SCR0-SCR2
Rate Control
1
SCI Select
+ M
2
3
4
Clock (RTI)
Receive
SCI
5
Control Bit "M"
6
8 or 9 Bit Data
Selects
7
+ 16
8
Stop
Start
MC68HC11G5
Clock (Tx)
Transmit
0
SCI

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