UJA1079 NXP [NXP Semiconductors], UJA1079 Datasheet - Page 23
UJA1079
Manufacturer Part Number
UJA1079
Description
LIN core system basis chip
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.UJA1079.pdf
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NXP Semiconductors
UJA1079_2
Product data sheet
The sampling of the wake-up pins can be synchronized with the WBIAS signal by setting
bits WSE1 and WSE2 in the Int_Control register to 1 (if WSEx = 0, wake-up pins are
sampled continuously). The sampling will be performed on the rising edge of WBIAS (see
Figure
(WBC) in the Mode_Control register.
Figure 10
Fig 9.
Fig 10. Typical application for cyclic sampling of wake-up signals
9). The sampling time, 16 ms or 64 ms, is selected via the Wake Bias Control bit
Wake-up int
WAKEx pin
WBIAS pin
UJA1079
Wake-up pin sampling synchronized with WBIAS signal
shows typical circuit for implementing cyclic sampling of the wake-up inputs.
WBIASI
(internal)
GND
All information provided in this document is subject to legal disclaimers.
BAT
WBIAS
WAKE1
WAKE2
Rev. 02 — 27 May 2010
enable bias
47 kΩ
47 kΩ
PDTA144E
disable bias
biasing of
switches
disable bias
sample of
WAKEx
wake level latched
LIN core system basis chip
sample of
WAKEx
UJA1079
© NXP B.V. 2010. All rights reserved.
015aaa078
sample of
WAKEx
015aaa126
23 of 45
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