TLE7209-2R_07 INFINEON [Infineon Technologies AG], TLE7209-2R_07 Datasheet - Page 13
![no-image](/images/no-image-200.jpg)
TLE7209-2R_07
Manufacturer Part Number
TLE7209-2R_07
Description
7 A H-Bridge for DC-Motor Applications
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet
1.TLE7209-2R_07.pdf
(32 pages)
2.4.2.3
The 16 input bits consist of the SPI-instruction byte and a second, unused byte. The 16
output bits consist of the verification-byte and the data-byte (see also Figure 8). The
definition of these bytes is given in the subsequent sections.
Figure 8
2.4.2.4
The uppermost 2 bit of the instruction byte contain the chip-address. The chip-address
of the TLE 7209-2R is 00. During read-access, the output data according to the register
requested in the instruction byte are applied to SDO within the same SPI frame. That
means, the output data corresponding to an instruction byte sent during one SPI frame
are transmitted to SDO during the same SPI frame.
Table 3
MSB
Table 4
Data Sheet
7
0
Bit
7,6
5-1
0
SDO
SCK
SDI
CSN
SPI-Communication
SPI instruction
Name
CPAD1,0
6
0
INSTR (4-0)
INSW
7
MSB
MSB
SPI instruction Description
SPI communication
SPI Instruction Format
6
5
5
INSTR4
Verification byte
SPI Instruction
4
3
4
INSTR3
Description
Chip Address (has to be ‘0’, ‘0’)
SPI instruction (encoding)
Even parity
2
1
LSB
LSB MSB
0
13
3
INSTR2
7
6
2
INSTR1
5
4
data-byte
not used
3
INSTR0
1
Circuit Description
2
Rev. 1.4, 2007-04-05
1
TLE 7209-2R
LSB
0
INSW
0