PIC18F4410 MICROCHIP [Microchip Technology], PIC18F4410 Datasheet - Page 373

• Manufacturer Part Number: PIC18F4410
• Description: 28/40/44-Pin Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
• Manufacturer: MICROCHIP [Microchip Technology]

Timing Diagrams and Specifications ................................ 331
© 2007 Microchip Technology Inc.
PWM Auto-Shutdown (PRSEN = 0,
PWM Auto-Shutdown (PRSEN = 1,
PWM Direction Change ........................................... 145
PWM Direction Change at Near
PWM Output ............................................................ 134
Repeat Start Condition ............................................. 180
Reset, Watchdog Timer (WDT), Oscillator Start-up
Send Break Character Sequence ............................ 205
Slave Synchronization ............................................. 157
Slow Rise Time (MCLR Tied to V
SPI Mode (Master Mode) ......................................... 156
SPI Mode (Slave Mode, CKE = 0) ........................... 158
SPI Mode (Slave Mode, CKE = 1) ........................... 158
Synchronous Reception (Master Mode, SREN) ...... 208
Synchronous Transmission ...................................... 206
Synchronous Transmission (Through TXEN) .......... 207
Time-out Sequence on POR w/PLL Enabled
Time-out Sequence on Power-up
Time-out Sequence on Power-up
Time-out Sequence on Power-up
Timer0 and Timer1 External Clock .......................... 335
Transition for Entry to Idle Mode ................................ 38
Transition for Entry to SEC_RUN Mode .................... 35
Transition for Entry to Sleep Mode ............................ 37
Transition for Two-Speed Start-up
Transition for Wake from Idle to Run Mode ............... 38
Transition for Wake from Sleep (HSPLL) ................... 37
Transition from RC_RUN Mode to
Transition from SEC_RUN Mode to
Transition to RC_RUN Mode ..................................... 36
USART Synchronous Receive (Master/Slave) ........ 346
USART Synchronous Transmission
A/D Conversion Requirements ................................ 348
Capture/Compare/PWM (CCP)
CLKO and I/O Requirements ................................... 333
Example SPI Mode Requirements
Example SPI Mode Requirements
Example SPI Mode Requirements
Auto-Restart Disabled) .................................... 148
Auto-Restart Enabled) ..................................... 148
100% Duty Cycle ............................................. 145
Timer (OST), Power-up Timer (PWRT) ........... 334
V
(MCLR Tied to V
(MCLR Not Tied to V
(MCLR Not Tied to V
(MCLR Tied to V
(INTOSC to HSPLL) ........................................ 248
PRI_RUN Mode ................................................. 36
PRI_RUN Mode (HSPLL) .................................. 35
(Master/Slave) ................................................. 346
Requirements .................................................. 336
(Master Mode, CKE = 0) .................................. 338
(Master Mode, CKE = 1) .................................. 339
(Slave Mode, CKE = 0) .................................... 340
DD
Rise > T
PWRT
DD
DD
) ............................................ 47
) ........................................... 47
, V
DD
DD
DD
, Case 1) ....................... 46
, Case 2) ....................... 46
Rise < T
DD
,
PWRT
) ........... 46
Preliminary
Top-of-Stack Access .......................................................... 54
TRISE Register
TSTFSZ ........................................................................... 297
Two-Speed Start-up ................................................. 237, 248
Two-Word Instructions
TXSTA Register
V
Voltage Reference Specifications .................................... 327
W
Watchdog Timer (WDT) ........................................... 237, 246
WCOL ...................................................... 179, 180, 181, 184
WCOL Status Flag ................................... 179, 180, 181, 184
WWW Address ................................................................ 373
WWW, On-Line Support ...................................................... 6
X
XORLW ........................................................................... 297
XORWF ........................................................................... 298
Example SPI Mode Requirements
External Clock Requirements .................................. 331
I
Master SSP I
Master SSP I
Parallel Slave Port Requirements
PLL Clock ................................................................ 332
Reset, Watchdog Timer, Oscillator Start-up
Timer0 and Timer1 External Clock
USART Synchronous Receive Requirements ......... 346
USART Synchronous Transmission
PSPMODE Bit ......................................................... 104
Example Cases ......................................................... 58
BRGH Bit ................................................................. 195
Associated Registers ............................................... 247
Control Register ....................................................... 246
During Oscillator Failure .......................................... 249
Programming Considerations .................................. 246
2
C Bus Data Requirements (Slave Mode) .............. 343
PIC18F2X1X/4X1X
(Slave Mode, CKE = 1) .................................... 341
Requirements .................................................. 344
(PIC18F4410/4510/4515/4610) ....................... 337
Timer, Power-up Timer and Brown-out
Reset Requirements ........................................ 334
Requirements .................................................. 335
Requirements .................................................. 346
2
2
C Bus Data Requirements ................ 345
C Bus Start/Stop Bits
DS39636C-page 371