ADM706R AD [Analog Devices], ADM706R Datasheet - Page 4

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ADM706R

Manufacturer Part Number
ADM706R
Description
+3 V, Voltage Monitoring uP Supervisory Circuits
Manufacturer
AD [Analog Devices]
Datasheet

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ADM706P/R/S/T, ADM708R/S/T
Mnemonic
MR
V
GND
PFI
PFO
WDI
NC
RESET
RESET
WDO
CC
Pin No.
ADM706
1
2
3
4
5
6
N/A
7 (R/S/T Only)
7 (P Only)
8
GND
V
MR
PFI
CC
1
2
3
4
(Not to Scale)
ADM706
TOP VIEW
Pin No.
ADM708
1
2
3
4
5
N/A
6
7
8
N/A
P
8
7
6
5
WDO
RESET
WDI
PFO
Function
Manual Reset Input. When taken below 0.6 V a RESET is generated. MR can be
driven from TTL, CMOS logic or from a manual reset switch as it is internally
debounced. An internal 70 A pull-up current holds the input high when floating.
Power Supply Input.
0 V. Ground reference for all signals.
Power Fail Input. PFI is the noninverting input to the Power Fail Comparator.
When PFI is less than 1.25 V, PFO goes low. If unused, PFI should be connected
to GND.
Power Fail Output. PFO is the output from the Power Fail Comparator. It goes
low when PFI is less than 1.25 V.
Watchdog Input. WDI is a three level input. If WDI remains either high or low
for longer than the watchdog timeout period, the watchdog output WDO goes
low. The timer resets with each transition at the WDI input. Either a high-to-low
or a low-to-high transition will clear the counter. The internal timer is also
cleared whenever reset is asserted. The Watchdog Timer is disabled when WDI is
left floating or connected to a three-state buffer.
No Connect.
Logic Output. RESET goes low for 200 ms when triggered. It can be triggered
either by V
reset (MR) input. RESET will remain low whenever V
threshold. It remains low for 200 ms after V
MR goes from low to high. A watchdog timeout will not trigger RESET unless
WDO is connected to MR.
Logic Output. RESET is an active high output suitable for systems which use
active high RESET logic. It is the inverse of RESET.
Logic Output. The Watchdog Output, WDO, goes low if the internal watchdog
timer times out as a result of inactivity on the WDI input. It remains low until
the watchdog timer is cleared. WDO also goes low during low line conditions.
Whenever V
goes above the reset threshold, WDO goes high immediately.
PIN FUNCTION DESCRIPTIONS
GND
PIN CONFIGURATIONS
V
MR
PFI
CC
CC
1
2
3
4
CC
being below the reset threshold or by a low signal on the manual
(Not to Scale)
is below the reset threshold, WDO remains low. As soon as V
ADM706
TOP VIEW
R/S/T
–4–
8
7
6
5
WDO
RESET
WDI
PFO
GND
V
MR
PFI
CC
1
2
3
4
NC = NO CONNECT
CC
(Not to Scale)
ADM708
TOP VIEW
goes above the reset threshold or
R/S/T
CC
8
7
6
5
is below the reset
RESET
RESET
NC
PFO
CC
REV. A

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