SAB-C161K-L16M SIEMENS [Siemens Semiconductor Group], SAB-C161K-L16M Datasheet - Page 19

• Manufacturer Part Number: SAB-C161K-L16M
• Description: 16-Bit CMOS Single-Chip Microcontroller
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

C161
1996 Intermediate Version
Parallel Ports
The C161 provides up to 63 I/O lines which are organized into six input/output ports and one input
port. All port lines are bit-addressable, and all input/output lines are individually (bit-wise)
programmable as inputs or outputs via direction registers. The I/O ports are true bidirectional ports
which are switched to high impedance state when configured as inputs. The output drivers of three
I/O ports can be configured (pin by pin) for push/pull operation or open-drain operation via control
registers. During the internal reset, all port pins are configured as inputs.
All port lines have programmable alternate input or output functions associated with them. PORT0
and PORT1 may be used as address and data lines when accessing external memory, while Port 4
outputs the additional segment address bits A21/19/17...A16 in systems where segmentation is
enabled to access more than 64 KBytes of memory. Port 6 provides optional chip select signals.
Port 3 includes alternate functions of timers, serial interfaces and the optional bus control signal
BHE. Port 5 is used for timer control signals. All port lines that are not used for these alternate
functions may be used as general purpose I/O lines.
Watchdog Timer
The Watchdog Timer represents one of the fail-safe mechanisms which have been implemented to
prevent the controller from malfunctioning for longer periods of time.
The Watchdog Timer is always enabled after a reset of the chip, and can only be disabled in the time
interval until the EINIT (end of initialization) instruction has been executed. Thus, the chip’s start-up
procedure is always monitored. The software has to be designed to service the Watchdog Timer
before it overflows. If, due to hardware or software related failures, the software fails to do so, the
Watchdog Timer overflows and generates an internal hardware reset and pulls the RSTOUT pin low
in order to allow external hardware components to be reset.
The Watchdog Timer is a 16-bit timer, clocked with the system clock divided either by 2 or by 128.
The high byte of the Watchdog Timer register can be set to a prespecified reload value (stored in
WDTREL) in order to allow further variation of the monitored time interval. Each time it is serviced
by the application software, the high byte of the Watchdog Timer is reloaded. Thus, time intervals
between 32 s and 524 ms can be monitored (@ 16 MHz). The default Watchdog Timer interval
after reset is 8.19 ms (@ 16 MHz).
Semiconductor Group
18