SAB-C161K-L16M SIEMENS [Siemens Semiconductor Group], SAB-C161K-L16M Datasheet - Page 5

• Manufacturer Part Number: SAB-C161K-L16M
• Description: 16-Bit CMOS Single-Chip Microcontroller
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

Pin Definitions and Functions
Symbol
XTAL1
XTAL2
P3.2 –
P3.13
P4.0 –
P4.5
RD
Semiconductor Group
Pin
Number
2
3
5 –
16
5
6
7
8
9
10
11
12
13
14
15
16
17-20,
23, 24
17
...
24
25
Input
Output
I
O
I/O
I/O
I
O
I
I
I
I
I/O
I/O
O
I/O
O
O
I/O
I/O
I/O
O
...
O
O
Function
XTAL1:
XTAL2:
To clock the device from an external source, drive XTAL1, while
leaving XTAL2 unconnected. Minimum and maximum high/low
and rise/fall times specified in the AC Characteristics must be
observed.
Port 3 is a 12-bit bidirectional I/O port. It is bit-wise programmable
for input or output via direction bits. For a pin configured as input,
the output driver is put into high-impedance state.
The following Port 3 pins also serve for alternate functions:
P3.2
This function is only available on the C161O.
P3.3
P3.4
P3.5
P3.6
P3.7
These functions are only available on the C161K and the C161O.
P3.8
P3.9
P3.10
P3.11
P3.12
P3.13
Port 4 is a 6-bit bidirectional I/O port. It is bit-wise programmable
for input or output via direction bits. For a pin configured as input,
the output driver is put into high-impedance state.
In case of an external bus configuration, Port 4 can be used to
output the segment address lines:
P4.0
...
P4.5
External Memory Read Strobe. RD is activated for every external
instruction or data read access.
1996 Intermediate Version
Input to the oscillator amplifier and input to the internal
clock generator
Output of the oscillator amplifier circuit.
CAPIN
T3OUT
T3EUD
T4IN
T3IN
T2IN
MRST
MTSR
TxD0
RxD0
BHE
WRH
SCLK
A16
...
A21
4
GPT2 Register CAPREL Capture Input
GPT1 Timer T3 Toggle Latch Output
GPT1 Timer T3 Ext.Up/Down Ctrl.Input
GPT1 Timer T4 Input for
Count/Gate/Reload/Capture
GPT1 Timer T3 Count/Gate Input
GPT1 Timer T2 Input for
Count/Gate/Reload/Capture
SSC Master-Rec./Slave-Transmit I/O
SSC Master-Transmit/Slave-Rec. O/I
ASC0 Clock/Data Output (Asyn./Syn.)
ASC0 Data Input (Asyn.) or I/O (Syn.)
Ext. Memory High Byte Enable Signal,
Ext. Memory High Byte Write Strobe
SSC Master Clock Outp./Slave Cl. Inp.
Least Significant Segment Addr. Line
...
Most Significant Segment Addr. Line
C161