SAB-C161K-L16M SIEMENS [Siemens Semiconductor Group], SAB-C161K-L16M Datasheet - Page 38

• Manufacturer Part Number: SAB-C161K-L16M
• Description: 16-Bit CMOS Single-Chip Microcontroller
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

AC Characteristics (cont’d)
Demultiplexed Bus
V
T
C
C
ALE cycle time = 4 TCL + 2
Parameter
ALE high time
Address setup to ALE
ALE falling edge to RD,
WR (with RW-delay)
ALE falling edge to RD,
WR (no RW-delay)
RD, WR low time
RD, WR low time
RD to valid data in
RD to valid data in
ALE low to valid data in
Address to valid data in
Data hold after RD
rising edge
Data float after RD rising
edge (with RW-delay)
Data float after RD rising
edge (no RW-delay)
Data valid to WR
Data hold after WR
ALE rising edge after RD,
WR
Semiconductor Group
(with RW-delay)
(no RW-delay)
(with RW-delay)
(no RW-delay)
A
CC
L
L
= 0 to +70 ˚C
(for PORT0, PORT1, Port 4, ALE, RD, WR, BHE, CLKOUT) = 100 pF
(for Port 6, CS) = 100 pF
= 5 V
10 %;
V
for SAB-C161K-L16M, SAB-C161O-L16M
(SAB-C161V-L16M does not provide the demultiplexed bus modes)
SS
= 0 V
t
A
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
5
6
8
9
12
13
14
15
16
17
18
20
21
22
24
26
+
1996 Intermediate Version
t
C
CC 21 +
CC 16 +
CC 21 +
CC -10 +
CC 53 +
CC 84 +
CC 48 +
CC 21 +
CC -10 +
SR –
SR –
SR –
SR –
SR 0
SR –
SR –
+
t
F
(125 ns at 16-MHz CPU clock without waitstates)
min.
Max. CPU Clock
t
t
t
t
t
t
t
A
A
A
C
C
C
F
t
t
= 16 MHz
A
F
37
max.
–
–
–
–
–
–
43 +
74 +
74
+
95
+ 2
–
48 +
21 +
–
–
–
t
A
t
A
+
t
t
t
t
+
C
C
F
F
t
C
t
C
min.
TCL - 10 +
TCL - 15 +
TCL - 10
+
-10
+
2TCL - 10
+
3TCL - 10
+
–
–
–
–
0
–
–
2TCL - 15
+
TCL - 10 +
-10
+
t
t
t
t
t
t
A
A
C
C
C
F
1/2TCL = 1 to 16 MHz
Variable CPU Clock
t
t
t
A
A
F
max.
–
–
–
–
–
–
2TCL - 20
+
3TCL - 20
+
3TCL - 20
+
4TCL - 30
+ 2
–
2TCL - 15
+
TCL - 10
+
–
–
–
t
t
t
t
t
C
C
A
F
F
t
A
+
+
t
C
t
C
C161
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns