SAF-XE167F-48F66L INFINEON [Infineon Technologies AG], SAF-XE167F-48F66L Datasheet - Page 64

• Manufacturer Part Number: SAF-XE167F-48F66L
• Description: 16-Bit Single-Chip Real Time Signal Controller
• Manufacturer: INFINEON [Infineon Technologies AG]

3.11
The XE167 includes up to three USIC modules (USIC0, USIC1, USIC2), each providing
two serial communication channels.
The Universal Serial Interface Channel (USIC) module is based on a generic data shift
and data storage structure which is identical for all supported serial communication
protocols. Each channel supports complete full-duplex operation with a basic data buffer
structure (one transmit buffer and two receive buffer stages). In addition, the data
handling software can use FIFOs.
The protocol part (generation of shift clock/data/control signals) is independent of the
general part and is handled by protocol-specific preprocessors (PPPs).
The USIC’s input/output lines are connected to pins by a pin routing unit. The inputs and
outputs of each USIC channel can be assigned to different interface pins, providing great
flexibility to the application software. All assignments can be made during runtime.
Figure 10
The regular structure of the USIC module brings the following advantages:
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•
Data Sheet
Higher flexibility through configuration with same look-and-feel for data management
Reduced complexity for low-level drivers serving different protocols
Wide range of protocols with improved performances (baud rate, buffer handling)
Bus
Universal Serial Interface Channel Modules (USIC)
f
sys
General Structure of a USIC Module
Buffer & Shift Structure Protocol Preprocessors
DBU
DBU
0
1
Fractional
Control 0
Control 1
Dividers
DSU
DSU
0
1
62
Generators
Baud rate
PPP_C
PPP_D
PPP_C
PPP_D
PPP_A
PPP_B
PPP_A
PPP_B
XE166 Family Derivatives
Functional Description
USIC_basic.vsd
Pins
V2.1, 2008-08
XE167x