AT42QT1111MU ATMEL [ATMEL Corporation], AT42QT1111MU Datasheet - Page 31

• Manufacturer Part Number: AT42QT1111MU
• Manufacturer: ATMEL [ATMEL Corporation]

7.6
7.7
9571A–AT42–02/10
Address 2: Detect Integrator Limit (DIL)/Drift Hold Time (DHT)
Address 3: Positive Threshold (PTHR)/Positive Hysteresis (PHYST)
Where data is being sent by the host, a 1-byte CRC should be sent. The QT1111 returns the
expected CRC byte in the same transaction the CRC byte is sent. In this way, the host can
immediately determine whether the setup data bytes were received correctly.
Default GUARD_KEY value:
Default GD_EN value:
Default CHG value:
Default CRC value:
Table 7-5.
DIL: the detection integrator (DI) limit. To suppress false detections caused by spurious events
like electrical noise, the device incorporates a DI counter mechanism. A per-key counter is
incremented each time the channel has exceeded its threshold and stayed there for a number of
acquisitions in succession, without going below the threshold level. When this counter reaches a
preset limit the channel is finally declared to be touched. If on any acquisition the delta is not
seen to exceed the threshold level, the counter is cleared and the process has to start from the
beginning.
Note:
DHT: the drift hold time. After a key-touch has been removed, the QT1111 pauses in the
implementation of its “Drift” compensation for a time. After this time has expired, drift
compensation continues as normal. The “Drift Hold Time” is a multiple of 160 ms, providing
options from 0 to 2400 ms.
Default DIL value:
Default DHT value:
Table 7-6.
PTHR: the positive threshold for the signal. If a key signal is significantly higher than the
reference signal, this typically indicates that the calibration data is no longer valid. In other
words, some factor has changed since the calibration was carried out, thus rendering it invalid.
Generally this is compensated for by the drift, but the greater the difference the longer this will
take. In order to speed up this correction, the positive threshold is used: if the positive threshold
is exceeded, the QT1111 (that is, all keys) is recalibrated.
Address
Address
2
3
A setting of 0 for DI is invalid; the valid range is 1 to 15.
Bit 7
Bit 7
Detect Integrator/Drift Hold Time
Positive Threshold (THR)/Positive Hystereis (HYST)
Bit 6
Bit 6
AT42QT1111-MU/AT42QT1111-AU
DIL
Bit 5
Bit 5
0 (Key 0)
0 (disabled)
0 (data mode)
0 (disabled)
3
8 (1280 ms)
PTHR
Bit 4
Bit 4
Bit 3
Bit 3
Bit 2
Bit 2
DHT
Bit 1
Bit 1
PHYST
Bit 0
Bit 0
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