CS7410-CQ CIRRUS [Cirrus Logic], CS7410-CQ Datasheet - Page 31

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CS7410-CQ

Manufacturer Part Number
CS7410-CQ
Description
CD/MP3/WMA Audio Controller
Manufacturer
CIRRUS [Cirrus Logic]
Datasheet
4.4
DS553PP1
3, 4, 5, 6, 7, 8, 9,
10, 11, 13, 15, 20,
21, 22, 23, 24
25, 26, 27, 28,
29, 30, 31, 32,
33, 34, 35, 36
37
39
41
43
45
46
47
3, 4, 5, 6,
9, 10,
15, 20, 21, 22,
23, 24
SDRAM / DRAM Interface
These pins are used to interface the CS7410 with external synchronous or EDO DRAMs. Data widths of 4
to 16 bits are supported. The CS7410 supports word or block transfers (partial word transfers are not re-
quired).
gives pin definitions for interfacing to EDO DRAM.
Pin
Pin
68
69
70
72
74
76
11, 13,
7, 8,
Table 10
DRAM
Data[15..0]
DRAM
Address[11..0]
DR_RAS_L
DR_CAS_L
M_WE_L
DR_CKO
DR_CKE
DR_BS_L
M_AP_OE
DRAM
Data[15..0]
Signal Name
Signal Name
gives instructions on how to interface to any particular configuration of SDRAM.
SER3_CLK
SER3_SS0
SER3_SS1
SER3_DO
SER2_CS
SER3_DI
Table 9. Serial Interface Pins (Continued)
Table 11. EDO DRAM Interface
O
O
O
O
O
O
O
O
Table 10. SDRAM Interface
Type
Type
B
B
O
O
O
O
B
I
Memory Data Bus.
Memory Address Bus. Connect in order starting with
DR_Addr[0] to all RAM address pins not already connected
to DR_BS_L or DR_AP.
Memory Row Address Strobe
Memory Column Address Strobe
Memory Write Enable
SDRAM Clock
SDRAM Clock Enable
Bank Selection. Always connect to RAM BS or BS0 pin.
Memory Auto Pre-charge. Always connect to RAM AP pin.
Memory Data Bus.
Chip select for 4-wire serial port (output if master, input if
slave mode). Can also be used as bidirectional ready line.
Clock output
Data output – up to 32 bits per transfer.
Data input – up to 96 bits per transfer.
Slave select for first peripheral (programmable polarity)
Slave select for second peripheral (programmable polar-
ity)
Description
Description
CS7410
Table 11
31

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