MK50H25 STMICROELECTRONICS [STMicroelectronics], MK50H25 Datasheet - Page 36

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MK50H25

Manufacturer Part Number
MK50H25
Description
HIGH SPEED LINK LEVEL CONTROLLER
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

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MK50H25
4.3.1.2 Receive Message Descriptor 1 (RMD1)
4.3.1.3 Receive Message Descriptor 2 (RMD2)
36/64
11
10
09
08
07:00
BIT
15:01
BIT
15:00
UIR
FRMRR
RADR
RPF
RBADR
NAME
RBADR
NAME
BCNT
1
5
1
5
1
4
1
4
1
3
1
3
UI Received indicates a UI frame has been received and is in this buffer.
FRMR Received indicates the I-field of a FRMR is stored in this buffer.
In Transparent mode with RBFCS=1 (IADR+16) it indicates received
frame referenced by this Message Descriptor has a bad FCS.
Valid only in Transparent Mode with address filtering enabled, RADR
indicates which of the 2 programmable addresses the frame matched.
If set, the received address field matched the value in the Local Ad-
dress field of the Initialization Block. Otherwise it matched the value in
the Remote Address field.
Valid only for UI, XID, and TEST frames. RPF equals the state of the P
or F bit for the received frame.
The High Order 8 address bits of the buffer pointed to by this descriptor.
This field is written by the Host and unchanged by MK50H25.
DESCRIPTION
The low order 16 address bits of the receive buffer pointed to by this
descriptor. RBADR is written by the Host CPU and unchanged by
MK50H25. The receive buffers must be word aligned.
DESCRIPTION
Buffer Byte Count is the length of the buffer pointed to by this
descriptor expressed in two’s complement. This field is written to by
the Host and unchanged by MK50H25. The value of BCNT must be
an even number.
1
2
1
2
1
1
1
1
1
0
1
0
RBADR<15:00>
BCNT<15:00>
0
9
0
9
0
8
0
8
0
7
0
7
0
6
0
6
0
5
0
5
0
4
0
4
0
3
0
3
0
2
0
2
0
1
0
1
0
0
0
0
0
0

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