HD6437101 RENESAS [Renesas Technology Corp], HD6437101 Datasheet - Page 17

• Manufacturer Part Number: HD6437101
• Description: 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

13.4 Operation........................................................................................................................... 369
13.5 Interrupt Sources ............................................................................................................... 379
13.6 Operation Timing.............................................................................................................. 379
13.7 Usage Notes ...................................................................................................................... 383
13.8 Port Output Enable (POE)................................................................................................. 386
Section 14 Pin Function Controller (PFC)........................................................ 393
14.1 Register Descriptions ........................................................................................................ 409
14.2 Usage Note........................................................................................................................ 427
Section 15 I/O Ports .......................................................................................... 429
15.1 Port A ................................................................................................................................ 429
15.2 Port B ................................................................................................................................ 432
15.3 Port D ................................................................................................................................ 434
13.3.9 Timer Period Buffer Register (TPBR) ................................................................. 368
13.3.10 Timer Period Data Register (TPDR).................................................................... 369
13.4.1 Sample Setting Procedure .................................................................................... 370
13.4.2 Output Protection Functions ................................................................................ 378
13.6.1 Input/Output Timing ............................................................................................ 379
13.6.2 Interrupt Signal Timing........................................................................................ 382
13.7.1 Module Standby Mode Setting ............................................................................ 383
13.7.2 Notes on MMT Operation.................................................................................... 383
13.8.1 Features................................................................................................................ 386
13.8.2 Input/Output Pins ................................................................................................. 387
13.8.3 Register Description............................................................................................. 387
13.8.4 Operation ............................................................................................................. 390
13.8.5 Usage Note........................................................................................................... 391
14.1.1 Port A I/O Register L (PAIORL) ......................................................................... 409
14.1.2 Port A Control Registers L3 to L1 (PACRL3 to PACRL1)................................. 409
14.1.3 Port B I/O Register (PBIOR) ............................................................................... 416
14.1.4 Port B Control Registers 1 and 2 (PBCR1 and PBCR2) ...................................... 417
14.1.5 Port D I/O Register L (PDIORL) ......................................................................... 419
14.1.6 Port D Control Registers L1 and L2 (PDCRL1 and PDCRL2)............................ 419
14.1.7 Port E I/O Registers L and H (PEIORL and PEIORH)........................................ 421
14.1.8 Port E Control Registers L1, L2, and H (PECRL1, PECRL2, and PECRH) ....... 421
15.1.1 Register Description............................................................................................. 430
15.1.2 Port A Data Register L (PADRL) ........................................................................ 431
15.2.1 Register Description............................................................................................. 433
15.2.2 Port B Data Register (PBDR) .............................................................................. 433
15.3.1 Register Description............................................................................................. 434
Rev.1.00 Sep. 18, 2008 Page xvii of xxxiv
REJ09B0069-0100