HD6437101 RENESAS [Renesas Technology Corp], HD6437101 Datasheet - Page 53

• Manufacturer Part Number: HD6437101
• Description: 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

2.3
2.3.1
Register operands are always longwords (32 bits). If the size of memory operand is a byte (8 bits)
or a word (16 bits), it is changed into a longword by expanding the sign-part when loaded into a
register.
2.3.2
Memory data formats are classified into bytes, words, and longwords. Byte data can be accessed
from any address. Locate, however, word data at an address 2n, longword data at 4n. Otherwise,
an address error will occur if an attempt is made to access word data starting from an address other
than 2n or longword data starting from an address other than 4n. In such cases, the data accessed
cannot be guaranteed. The hardware stack area, pointed by the hardware stack pointer (SP, R15),
uses only longword data starting from address 4n because this area holds the program counter and
status register.
2.3.3
Byte (8 bit) immediate data resides in an instruction code. Immediate data accessed by the MOV,
ADD, and CMP/EQ instructions is sign-extended and handled in registers as longword data.
Immediate data accessed by the TST, AND, OR, and XOR instructions is zero-extended and
handled as longword data. Consequently, AND instructions with immediate data always clear the
upper 24 bits of the destination register.
Data Formats
Data Format in Registers
Data Formats in Memory
Immediate Data Format
Address 2n
Address 4n
31
Figure 2.3 Data Formats in Memory
Figure 2.2 Data Format in Registers
Address m
31
Byte
Word
Address m + 1
Longword
23
Byte
Longword
Address m + 2
15
Rev.1.00 Sep. 18, 2008 Page 19 of 522
Byte
Word
Address m + 3
7
Byte
0
0
REJ09B0069-0100
Section 2 CPU