ADL5356-EVALZ AD [Analog Devices], ADL5356-EVALZ Datasheet

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ADL5356-EVALZ

Manufacturer Part Number
ADL5356-EVALZ
Description
1200 MHz to 2500 MHz, Dual-Balanced Mixer, LO Buffer, IF Amplifier, and RF Balun
Manufacturer
AD [Analog Devices]
Datasheet
FEATURES
RF frequency range of 1200 MHz to 2500 MHz
IF frequency range of 30 MHz to 450 MHz
Power conversion gain: 8.2 dB
SSB noise figure of 9.9 dB
SSB noise figure with 5 dBm blocker of 21 dB
Input IP3 of 31 dBm
Input P1dB of 11 dBm
Typical LO drive of 0 dBm
Single-ended, 50 Ω RF and LO input ports
High isolation SPDT LO input switch
Single-supply operation: 3.3 V to 5 V
Exposed paddle, 6 mm × 6 mm, 36-lead LFCSP
APPLICATIONS
Cellular base station receivers
Transmit observation receivers
Radio link downconverters
GENERAL DESCRIPTION
The ADL5356 uses a highly linear, doubly balanced, passive mixer
core along with integrated RF and local oscillator (LO) balancing
circuitry to allow single-ended operation. The ADL5356
incorporates the RF baluns, allowing for optimal performance over
a 1200 MHz to 2500 MHz RF input frequency range. Performance
is optimized for RF frequencies from 1700 MHz to 2500 MHz
using a low-side LO and RF frequencies from 1200 MHz to
1700 MHz using a high-side LO. The balanced passive mixer
arrangement provides good LO-to-RF leakage, typically better
than −35 dBm, and excellent intermodulation performance. The
balanced mixer core also provides extremely high input linearity,
allowing the device to be used in demanding cellular applications
where in-band blocking signals may otherwise result in the
degradation of dynamic performance. A high linearity IF buffer
amplifier follows the passive mixer core to yield a typical power
conversion gain of 8.2 dB and can be used with a wide range of
output impedances.
The ADL5356 provides two switched LO paths that can be used
in TDD applications where it is desirable to ping-pong between
two local oscillators. LO current can be externally set using a
resistor to minimize dc current commensurate with the desired
level of performance. For low voltage applications, the ADL5356 is
capable of operation at voltages down to 3.3 V with substantially
reduced current. Under low voltage operation, an additional logic
pin is provided to power down (<300 μA) the circuit when desired.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
Mixer, LO Buffer, IF Amplifier, and RF Balun
1200 MHz to 2500 MHz, Dual-Balanced
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
The ADL5356 is fabricated using a BiCMOS high performance
IC process. The device is available in a 6 mm × 6 mm, 36-lead
LFCSP and operates over a −40°C to +85°C temperature range.
An evaluation board is also available.
Table 1. Passive Mixers
RF Frequency
(MHz)
500 to 1700
1200 to 2500
COMM
COMM
COMM
MNCT
VPOS
VPOS
DVCT
MNIN
DVIN
1
2
3
4
5
6
7
8
9
36
10
FUNCTIONAL BLOCK DIAGRAM
35
11
Single
Mixer
ADL5367
ADL5365
34
12
©2009 Analog Devices, Inc. All rights reserved.
33
13
Figure 1.
32
14
Single Mixer
and IF Amp
ADL5357
ADL5355
31
15
ADL5356
30
16
ADL5356
29
17
www.analog.com
Dual Mixer
and IF Amp
ADL5358
ADL5356
28
18
27
26
25
24
23
22
21
20
19
LOI2
VGS2
VGS1
VGS0
LOSW
PWDN
VPOS
COMM
LOI1

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ADL5356-EVALZ Summary of contents

Page 1

... The ADL5356 provides two switched LO paths that can be used in TDD applications where it is desirable to ping-pong between two local oscillators. LO current can be externally set using a resistor to minimize dc current commensurate with the desired level of performance ...

Page 2

... ADL5356 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Specifications ..................................................................................... Performance ........................................................................... 4 3.3 V Performance ........................................................................ 4 Absolute Maximum Ratings ............................................................ 5 ESD Caution .................................................................................. 5 Pin Configuration and Function Descriptions ............................. 6 Typical Performance Characteristics ............................................. Performance ........................................................................... 7 3.3 V Performance ...................................................................... 15 Spur Tables .................................................................................. 16 REVISION HISTORY 10/09—Revision 0: Initial Version   ...

Page 3

... MHz, LO power = 0 dBm, RF power = −10 dBm 1.3 kΩ Conditions Tunable to >20 dB over a limited bandwidth Differential impedance 200 MHz Externally generated Device enabled, IF output to 90% of its final level Device disabled, supply current < Device enabled Device disabled Rev Page ADL5356 Min Typ Max Unit Ω 1200 2500 MHz 230||0 ...

Page 4

... ADL5356 5 V PERFORMANCE 350 mA 25° 1900 MHz VGS0 = VGS1 = VGS2 = 0 V, and Ω, unless otherwise noted. O Table 3. Parameter DYNAMIC PERFORMANCE Power Conversion Gain Voltage Conversion Gain SSB Noise Figure SSB Noise Figure Under Blocking Input Third-Order Intercept (IIP3) ...

Page 5

... Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION Rating 5 dBm 13 dBm 6.0 V 5.5 V 2.2 W 22°C/W 150°C −40°C to +85°C −65°C to +150°C 260°C Rev Page ADL5356 ...

Page 6

... LOSW 24, 25, 26 VGS0, VGS1, VGS2 27 LOI2 29 MNLG 31 MNLE 32, 33 MNOP, MNON 35 MNGM Paddle EPAD MNIN 1 MNCT 2 3 COMM ADL5356 VPOS 4 COMM 5 TOP VIEW (Not to Scale) VPOS 6 COMM 7 DVCT 8 9 DVIN NOTES CONNECT EXPOSED PAD MUST BE CONNECTED TO GROUND. Figure 2. Pin Configuration Description RF Input for Main Channel. Internally matched to 50 Ω ...

Page 7

... T = +25° 1700 1750 1800 1850 1900 1950 2000 2050 2100 2150 2200 Rev Page ADL5356 T = –40° +25° +85° FREQUENCY (MHz) Figure 6. Input IP2 vs. RF Frequency T = +25° +85° ...

Page 8

... ADL5356 350 mA 25° 1900 MHz Ω, VGS0 = VGS1 = VGS2 = 0 V, unless otherwise noted. O 400 V = 5.25V POS 380 360 V = 5.00V POS 340 V = 4.75V POS 320 300 –40 –30 –20 – TEMPERATURE (°C) Figure 9. Supply Current vs. Temperature 10 ...

Page 9

... IF FREQUENCY (MHz) Figure 19. Input P1dB vs. IF Frequency 130 180 230 280 330 80 IF FREQUENCY (MHz) Figure 20. SSB Noise Figure vs. IF Frequency ADL5356 = +25°C A 380 430 = +85° +25°C A 380 430 380 430 ...

Page 10

... ADL5356 350 mA 25° 1900 MHz Ω, VGS0 = VGS1 = VGS2 = 0 V, unless otherwise noted –40° +25° –6 –4 – POWER (dBm) Figure 21. Power Conversion Gain vs. LO Power ...

Page 11

... RF FREQUENCY (MHz) Figure 31. RF Port Return Loss, Fixed SELECTED 15 UNSELECTED 20 25 1.50 1.55 1.60 1.65 1.70 1.75 1.80 1.85 LO FREQUENCY (GHz) Figure 32. LO Return Loss, Selected and Unselected ADL5356 380 430 1.90 1.95 2.00 ...

Page 12

... ADL5356 350 mA 25° 1900 MHz Ω, VGS0 = VGS1 = VGS2 = 0 V, unless otherwise noted –40° 1700 1750 1800 1850 1900 1950 2000 2050 2100 2150 2200 RF FREQUENCY (MHz) Figure 33. LO Switch Isolation vs. RF Frequency ...

Page 13

... CONVERSION GAIN 600 700 800 900 1000 1100 1200 1300 IF BIAS RESISTOR VALUE (Ω) Figure 44. Power Conversion Gain, Noise Figure, and Input IP3 vs. IF Bias Resistor Value ADL5356 1400 1500 1600 1400 1500 ...

Page 14

... ADL5356 350 mA 25° 1900 MHz Ω, VGS0 = VGS1 = VGS2 = 0 V, unless otherwise noted –40° 1700 1750 1800 1850 1900 1950 2000 2050 2100 2150 2200 RF FREQUENCY (MHz) Figure 45. IF Channel-to-Channel Isolation vs. RF Frequency = 1697 MHz, LO power = 0 dBm, RF power = − ...

Page 15

... Figure 50. Input P1dB vs. RF Frequency at 3 +85° +25° 1700 1750 1800 1850 1900 1950 2000 2050 2100 2150 2200 RF FREQUENCY (MHz) Figure 51. SSB Noise Figure vs. RF Frequency at 3.3 V ADL5356 T = +25° +25° –40°C A ...

Page 16

... ADL5356 SPUR TABLES All spur tables are (N × − (M × and were measured using the standard evaluation board. Mixer spurious products are measured dBc from the IF output power level. Data was measured only for frequencies less than 6 GHz. Typical noise floor of the measurement system = − ...

Page 17

... CIRCUIT DESCRIPTION The ADL5356 consists of two primary components: the radio frequency (RF) subsystem and the local oscillator (LO) subsystem. The combination of design, process, and packaging technology allows the functions of these subsystems to be integrated into a single die using mature packaging and interconnection technologies to provide a high performance, low cost design with excellent electrical, mechanical, and thermal properties ...

Page 18

... V, resulting in substantial dc power savings. In addition, when operating with supply voltages below 3.6 V, the ADL5356 has a power-down mode that permits the dc current to drop to <300 μA. The logic inputs are designed to work with any logic family that provides a Logic 0 input level of less than 0.4 V and a Logic 1 input level that exceeds 1 ...

Page 19

... IP3 performance. MIXER VGS CONTROL DAC The ADL5356 features three logic control pins, VGS0 (Pin 24), VGS1 (Pin 25), and VGS2 (Pin26), that allow programmability for internal gate-to-source voltages for optimizing mixer performance over desired frequency bands ...

Page 20

... DIV_OUTP C30 C31 R9 Figure 53. Typical Application Circuit Rev Page MAIN_OUTP C18 VCC C16 27 R12 26 R7 R13 25 R8 R14 24 R11 R15 VCC C26 C15 ADL5356 20 LO1 19 C14 VCC C13 DIV_OUTN LO2 R16 VCC C34 R17 R19 ...

Page 21

... C31 R9 Figure 54. Evaluation Board Schematic Rev Page MAIN_OUTP C18 VCC R2 C16 LOI2 R12 VGS2 R7 VGS1 R13 R8 VGS0 R14 LOSW R11 PWDN R15 VPOS COMM VCC C26 C15 LOI1 LO1 C14 R5 VCC C13 DIV_OUTN ADL5356 LO2 R16 VCC C34 R17 R19 ...

Page 22

... LOSEL interface to be exercised using external logic generator. R19, PWDN PWDN Interface. When the PWDN 2-pin shunt is inserted, the ADL5356 is powered down. When R19 is open, it pulls the PWDN logic low and enables the device. Jumper can be removed to allow PWDN interface to be excercised using an external logic generator. ...

Page 23

... OUTLINE DIMENSIONS PIN 1 INDICATOR 12° MAX 1.00 0.85 0.80 SEATING PLANE ORDERING GUIDE Model 1 ADL5356ACPZ-R2 1 ADL5356ACPZ-R7 1 ADL5356-EVALZ RoHS Compliant Part. 6.00 BSC SQ 0.60 MAX 27 0.50 BSC TOP 5.75 VIEW BSC SQ 0.75 19 0.60 0.50 0.80 MAX 0.65 TYP 0.05 MAX 0.02 NOM COPLANARITY 0.35 0.08 0.20 REF 0.28 0.23 COMPLIANT TO JEDEC STANDARDS MO-220-VJJD-1 Figure 57. 36-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 6mm × ...

Page 24

... ADL5356 NOTES ©2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07883-0-10/09(0) Rev Page ...

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