ADL5356-EVALZ AD [Analog Devices], ADL5356-EVALZ Datasheet - Page 6

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ADL5356-EVALZ

Manufacturer Part Number
ADL5356-EVALZ
Description
1200 MHz to 2500 MHz, Dual-Balanced Mixer, LO Buffer, IF Amplifier, and RF Balun
Manufacturer
AD [Analog Devices]
Datasheet
ADL5356
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 6. Pin Function Descriptions
Pin No.
1
2
3, 5, 7, 12, 20, 34
4, 6, 10, 16,
21, 30, 36
8
9
11
13, 14
15
17
18, 28
19
22
23
24, 25, 26
27
29
31
32, 33
35
Paddle
Mnemonic
MNIN
MNCT
COMM
VPOS
DVCT
DVIN
DVGM
DVOP, DVON
DVLE
DVLG
NC
LOI1
PWDN
LOSW
VGS0, VGS1, VGS2
LOI2
MNLG
MNLE
MNOP, MNON
MNGM
EPAD
Description
RF Input for Main Channel. Internally matched to 50 Ω. Must be ac-coupled.
Center Tap for Main Channel Input Balun. Bypass to ground using low inductance capacitor.
Device Common (DC Ground).
Positive Supply Voltage.
Center Tap for Diversity Channel Input Balun. Bypass to ground using low inductance capacitor.
RF Input for Diversity Channel. Internally matched to 50 Ω. Must be ac-coupled.
Diverstiy Amplifier Bias Setting. Connect 1.3 kΩ resistor to ground for typical operation.
Diversity Channel Differential Open-Collector Outputs. DVOP and DVON should be pulled-up to
VCC using external inductors.
Diversity Channel IF Return. This pin must be grounded.
Diverstiy Channel LO Buffer Bias Setting. Connect 1 kΩ resistor to ground for typical operation.
No Connect.
Local Oscillator Input 1. Internally matched to 50 Ω. Must be ac-coupled.
Connect to Ground for Normal Operation. Connect pin to 3 V for disable mode when using
VPOS < 3.6 V. PWDN pin must be grounded when VPOS > 3.6 V.
Local Oscillator Input Selection Switch. Set LOSW high to select LOI1 or set LOSW low to select LOI2.
Gate to Source Control Voltages. For typical operation, set VGS0, VGS1, and VGS2 to low logic level.
Local Oscillator Input 2. Internally matched to 50 Ω. Must be ac-coupled.
Main Channel LO Buffer Bias Setting. Connect 1 kΩ resistor to ground for typical operation.
Main Channel IF Return. This pin must be grounded.
Main Channel Differential Open-Collector Outputs. MNOP and MNON should be pulled-up to
VCC using external inductors.
Main Amplifier Bias Setting. Connect 1.3 kΩ resistor to ground for typical operation.
Exposed pad must be connected to ground.
COMM
COMM
NOTES
1
2
COMM
MNCT
VPOS
VPOS
DVCT
. NC = NO CONNECT.
. EXPOSED PAD MUST BE CONNECTED TO GROUND.
MNIN
DVIN
1
2
3
4
5
6
7
8
9
Figure 2. Pin Configuration
Rev. 0 | Page 6 of 24
(Not to Scale)
ADL5356
TOP VIEW
27
26
25
24
23
22
21
20
19
LOI2
VGS2
VGS1
VGS0
LOSW
PWDN
VPOS
COMM
LOI1

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