M35080-BN3T STMICROELECTRONICS [STMicroelectronics], M35080-BN3T Datasheet - Page 4

• Manufacturer Part Number: M35080-BN3T
• Description: 8 Kbit Serial SPI Bus EEPROM With Incremental Registers
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

M35080
Figure 4. EEPROM and SPI Bus
OPERATIONS
All instructions, addresses and data are shifted se-
rially in and out of the chip (along the bus, as
shown in Figure 4). The most significant bit is pre-
sented first, with the data input (D) sampled on the
first rising edge of the clock (C) after the chip se-
lect (S) goes low (as shown in Figure 5, Figure 9,
and Figure 12).
Every instruction, as summarized in Table 5, starts
with a single-byte code. If an invalid instruction is
sent (one not contained in Table 5), the chip auto-
matically deselects itself.
The instruction code is entered via the data input
(D), and latched on the rising edge of the clock in-
put (C). To enter an instruction code, the device
must have been previously selected (S held low).
Table 5. Instruction Set
4/18
Instruction
SPI Interface with
(CPOL, CPHA) =
('0', '0') or ('1', '1')
CS3
WRINC
WRITE
WREN
WRSR
(ST6, ST7, ST9,
RDSR
READ
WRDI
ST10, Others)
Master
CS2
CS1
D
Q
C
Set Write Enable Latch
Reset Write Enable Latch
Read Status Register
Write Status Register
Read Data from Memory Array
Write Data to Memory Array
Write Data to Secure Array
S
C Q D
M35xxx
Description
Protection of the First 32 Bytes
The first 32-byte page is organized as 16 words
(two bytes each). The initial content of each word
on this page is 0000h. When writing to byte-pair, a
logic comparator verifies that the new two-byte
value is larger than the value currently stored. If
the new value is smaller than the current one, no
operation is performed. It is impossible to write a
value lower than the previous one, irrespective of
the state of W pin and status register, as indicated
in Table 6.
Write Enable (WREN) and Write Disable (WRDI)
The write enable latch, inside the memory device,
must be set prior to each WRITE and WRSR oper-
ation. The WREN instruction (write enable) sets
this latch, and the WRDI instruction (write disable)
resets it.
S
C Q D
M35xxx
Instruction Format
S
0000 0110
0000 0100
0000 0101
0000 0001
0000 0011
0000 0010
0000 0111
C Q D
M35xxx
AI02148C