HD151TS201ATEL RENESAS [Renesas Technology Corp], HD151TS201ATEL Datasheet - Page 16

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HD151TS201ATEL

Manufacturer Part Number
HD151TS201ATEL
Description
Mother Board Clock Generator for Intel P4 Chipset Banias and Dothan processor / ODEM and MONTARA-GM chip set
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
HD151TS201AT
I
Byte20 PCI Skew Control Register 3
Bit
7
6
5
4
3
2
1
0
Byte21 Slew Rate Control Register
Bit
7
6
5
4
3
2
1
0
Byte22 Slew Rate Control Register
Bit
7
6
5
4
3
2
1
0
Rev.1.00, Oct.21.2003, page 16 of 28
2
C Controlled Register Bit Map (cont.)
Description
(Reserved)
PCI6 skew Early or Late
PCI5 skew Early or Late
PCI4 skew Early or Late
PCI3 skew Early or Late
PCI2 skew Early or Late
PCI1 skew Early or Late
PCI0 skew Early or Late
Description
PCI clock slew rate controlbit1
PCI clock slew rate controlbit0
PCIF clock slew rate controlbit1
PCIF clock slew rate controlbit0
66OUT clock slew rate controlbit1
66OUT clock slew rate controlbit0
3V66 clock slew rate controlbit1
3V66 clock slew rate controlbit0
Description
Reserved
Reserved
Reserved
Reserved
REF clock slew rate controlbit1
REF clock slew rate controlbit0
VCH clock slew rate controlbit1
VCH clock slew rate controlbit0
Contents
“0” = Early
“1” = Late
Contents
00 : Normal
01 : +
00 : Normal
01 : +
00 : Normal
01 : +
00 : Normal
01 : +
Contents
00 : Normal
01 : +
00 : Normal
01 : +
10 : ++
10 : ++
10 : ++
10 : ++
10 : ++
10 : ++
11 : –
11 : –
11 : –
11 : –
11 : –
11 : –
Default
Default
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
1
0
0
0
0

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