HD151TS201ATEL RENESAS [Renesas Technology Corp], HD151TS201ATEL Datasheet - Page 8

• Manufacturer Part Number: HD151TS201ATEL
• Description: Mother Board Clock Generator for Intel P4 Chipset Banias and Dothan processor / ODEM and MONTARA-GM chip set
• Manufacturer: RENESAS [Renesas Technology Corp]

HD151TS201AT
I
Byte0 Control Register
Bit
7
6
5
4
3
2
1
0
Byte1 Control Register
Bit
7
6
5
4
3
2
1
0
Rev.1.00, Oct.21.2003, page 8 of 28
2
C Controlled Register Bit Map
Description
Spread spectrum Enable
CPUCLK Power down mode setting.
See Table4.
VCH (pin35) Select 66 MHZ or 48 MHz
CPUSTOP# status register
PCISTOP# Selection.
See Table5
Reflects the value of the S2 (pin40)
Reflects the value of the S1 (pin55)
Reflects the value of the S0(pin54)
Description
MULT0 (pin43) Value
CPUCLK Power down mode setting.
See Table4.
Control of CPU2 with CPUSTOP#
Control of CPU1 with CPUSTOP#
Control of CPU0 with CPUSTOP#
CPUT2/C2 Enable register
CPUT1/C1 Enable register
CPUT0/C0 Enable register
Contents
MULT0 value. This bit is read only.
See Table4
“1” = Free running
“0” = Not free running.
When this bit is “0”, CPUT/C outputs are affected
by CPUSTOP# pin.
“1” = Enabled
“0” = Disabled
(CPUT stops “High” & CPUC stops “Low”)
Contents
“0” = SSC OFF
See Table4
“1” = 48 MHz
“0” = 66 MHz
CPUSTOP# Reflects the current value of
external CPUSTOP# (pin53).
This bit is read only.
Reflects the current value of the internal
PCISTOP# function when read. Internally
PCISTOP# is a logical AND function of the
internal SM Bus registers bit and the external
PCISTOP# (pin34).
Frequency selects bit2, reflects the value of
S2 (pin40). This bit is read only.
Frequency selects bit1, reflects the value of
S1 (pin55). This bit is read only.
Frequency selects bit0, reflects the value of
S0 (pin54). This bit is read only.
“1” = SSC ON
Default
Default
1
1
0
0
0
1
1
X
X
X
X
0
0
0
0
1