AT24HC02B-10PU-1.8 ATMEL [ATMEL Corporation], AT24HC02B-10PU-1.8 Datasheet

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AT24HC02B-10PU-1.8

Manufacturer Part Number
AT24HC02B-10PU-1.8
Description
Utilizes Different Array Protection Compared
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Features
Description
The AT24HC02B provides 2048 bits of serial electrically erasable and programmable
read-only memory (EEPROM) organized as 256 words of 8 bits each. The device is opti-
mized for use in many industrial and commercial applications where low-power and low-
voltage operation are essential. The AT24HC02B is available in space-saving 8-lead
PDIP, 8-lead JEDEC SOIC and 8-lead TSSOP packages and is accessed via a two-wire
serial interface. In addition, the entire family is available in 1.8V (1.8V to 5.5V) version.
Table 1. Pin Configuration
Pin Name
A0–A2
SDA
SCL
WP
NC
Write Protect Pin for Hardware Data Protection
Low-voltage and Standard-voltage Operation
Internally Organized 256 x 8 (2K)
Two-wire Serial Interface
Schmitt Trigger, Filtered Inputs for Noise Suppression
Bidirectional Data Transfer Protocol
1 MHz (5V) and 400 kHz (1.8V, 2.5V, 2.7V) Clock Rate
8-byte Page
Partial Page Writes Allowed
Self-timed Write Cycle (5 ms Max)
High Reliability
8-lead PDIP, 8-lead JEDEC SOIC and 8-lead TSSOP Packages
Die Sales: Wafer Form, Waffle Pack, and Bumped Wafers
– Utilizes Different Array Protection Compared to the AT24C02B
– 1.8 (V
– Endurance: One Million Write Cycles
– Data Retention: 100 Years
CC
= 1.8V to 5.5V)
Function
Address Inputs
Serial Data
Serial Clock Input
Write Protect
No-connect
GND
A0
A1
A2
GND
GND
A0
A1
A2
A0
A1
A2
8-lead TSSOP
8-lead SOIC
8-lead PDIP
1
2
3
4
1
2
3
4
1
2
3
4
8
7
6
5
8
7
6
5
8
7
6
5
VCC
WP
SCL
SDA
VCC
WP
SCL
SDA
VCC
WP
SCL
SDA
Two-wire Serial
EEPROM
2K (256 x 8)
AT24HC02B
Rev. 5134A–SEEPR–9/05
1

Related parts for AT24HC02B-10PU-1.8

AT24HC02B-10PU-1.8 Summary of contents

Page 1

... Die Sales: Wafer Form, Waffle Pack, and Bumped Wafers Description The AT24HC02B provides 2048 bits of serial electrically erasable and programmable read-only memory (EEPROM) organized as 256 words of 8 bits each. The device is opti- mized for use in many industrial and commercial applications where low-power and low- voltage operation are essential ...

Page 2

... DEVICE/PAGE ADDRESSES (A2, A1, A0): The A2, A1 and A0 pins are device address inputs that must be hardwired for the AT24HC02B. As many as eight 2K devices may be addressed on a single bus system. (Device addressing is discussed in detail under Device Addressing, page 8). ...

Page 3

... When the WP pin is connected to V and operates as shown. Table 2. Write Protect WP Pin Status GND AT24HC02B, 2K SERIAL EEPROM: The 2K is internally organized with 32 pages of 8 bytes each. Random word addressing requires an 8-bit data word address. = 25° 1.0 MHz SCL) ...

Page 4

... IH V Output Low Level V = 3.0V OL2 CC V Output Low Level V = 1.8V OL1 CC Note min and V max are reference only and are not tested AT24HC02B 4 = −40°C to +85° Test Condition Min 1.8 2.5 2.7 4.5 READ at 100 kHz WRITE at 100 kHz ...

Page 5

... V = +1.8V to +5.5V TTL Gate and – 1.8, 2.5, 2.7 Min Max Min 400 1.2 0.4 0.6 0.4 50 0.1 0.9 0.05 1.2 0.5 0.6 0.25 0.6 0. 100 100 0.3 300 0.6 . AT24HC02B 5.0-volt Max Units 1000 kHz µs µ 0.55 µs µs µs µs µs ns 0.3 µs 100 ns µ Write Cycles 5 ...

Page 6

... The EEPROM sends a “0” to acknowledge that it has received each word. This happens during the ninth clock cycle. STANDBY MODE: The AT24HC02B features a low-power standby mode that is enabled: (a) upon power-up and (b) after the receipt of the Stop bit and the completion of any internal operations. ...

Page 7

... WR 5134A–SEEPR–9/05 1. Clock cycles 2. Look for SDA high in each cycle while SCL is high 3. Create a start condition as SDA is high. ACK t wr STOP CONDITION AT24HC02B (1) START CONDITION 7 ...

Page 8

... Figure 6. Output Acknowledge Device Addressing Write Operations AT24HC02B 8 The 2K EEPROM device requires an 8-bit device address word following a start condi- tion to enable the chip for a read or write operation, as shown in Figure 7. Figure 7. Device Address 2K 1 MSB The device address word consists of a mandatory “1”, “0” sequence for the first four most significant bits as shown ...

Page 9

... EEPROM inputs are disabled, acknowledge polling can be initiated. This involves send- ing a start condition followed by the device address word. The read/write bit is representative of the operation desired. Only if the internal write cycle has completed will the EEPROM respond with a “0” allowing the read or write sequence to continue. AT24HC02B ...

Page 10

... Read Operations AT24HC02B 10 Read operations are initiated the same way as write operations with the exception that the read/write select bit in the device address word is set to “1”. There are three read operations: current address read, random address read and sequential read. ...

Page 11

... Figure 12. Sequential Read 5134A–SEEPR–9/05 tial read will continue. The sequential read operation is terminated when the microcontroller does not respond with a “0” but does generate a following stop condition, see Figure 12. AT24HC02B 11 ...

Page 12

... AT24HC02B Ordering Information Ordering Code (2) AT24HC02B-10PU-1.8 (2) AT24HC02BN-10SU-1.8 (2) AT24HC02B-10TU-1.8 (3) AT24HC02B-W1.8-11 Notes: 1. For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC characteristics table. 2. “U” designates Green Package + RoHS compliant 3. Available in waffle pack and wafer form; order as SL788 for inkless wafer form. Bumped die available upon request. Please contact Serial EEPROM Marketing ...

Page 13

... Dambar protrusions. Dambar protrusions shall not exceed 0.010 (0.25 mm). 2325 Orchard Parkway San Jose, CA 95131 R 5134A–SEEPR–9/ TITLE 8P3, 8-lead, 0.300" Wide Body, Plastic Dual In-line Package (PDIP) AT24HC02B End View COMMON DIMENSIONS (Unit of Measure = inches) SYMBOL MIN NOM MAX A – – 0.210 A2 ...

Page 14

... JEDEC SOIC Top View e Side View Note: These drawings are for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R AT24HC02B TITLE 8S1, 8-lead (0.150" Wide Body), Plastic Gull Wing ...

Page 15

... Dimension D and determined at Datum Plane H. 2325 Orchard Parkway San Jose, CA 95131 R 5134A–SEEPR–9/ TITLE 8A2, 8-lead, 4.4 mm Body, Plastic Thin Shrink Small Outline Package (TSSOP) AT24HC02B L1 L End View COMMON DIMENSIONS (Unit of Measure = mm) MIN MAX SYMBOL NOM D 2.90 3.00 3 ...

Page 16

... Atmel Corporation 2005. All rights reserved. Atmel marks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. Atmel Operations Memory 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 ...

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