M24128-BFBN3G STMICROELECTRONICS [STMicroelectronics], M24128-BFBN3G Datasheet - Page 6

• Manufacturer Part Number: M24128-BFBN3G
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Description
1
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Description
The M24C32, M24C64 and M24128 devices are I
programmable memories (EEPROM). They are organized as 4096 × 8 bits, 8192 × 8 bits
and 16384 × 8 bits, respectively.
Figure 1.
I
The devices carry a built-in 4-bit Device Type Identifier code (1010) in accordance with the
I
The device behaves as a slave in the I
by the serial clock. Read and Write operations are initiated by a Start condition, generated
by the bus master. The Start condition is followed by a device select code and Read/Write
bit (RW) (as described in
When writing data to the memory, the device inserts an acknowledge bit during the 9
time, following the bus master’s 8-bit transmission. When data is read by the bus master, the
bus master acknowledges the receipt of the data byte in the same way. Data transfers are
terminated by a Stop condition after an Ack for Write, and after a NoAck for Read.
2
2
C uses a two-wire serial interface, comprising a bi-directional data line and a clock line.
C bus definition.
Logic diagram
Table
E0-E2
SCL
WC
3), terminated by an acknowledge bit.
3
2
C protocol, with all memory operations synchronized
V CC
V SS
M24C64
M24C32
M24128
2
C-compatible electrically erasable
AI01844e
SDA
M24128, M24C64, M24C32
th
bit