W25Q16 WINBOND [Winbond], W25Q16 Datasheet - Page 11

• Manufacturer Part Number: W25Q16
• Description: 8M-BIT, 16M-BIT AND 32M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI
• Manufacturer: WINBOND [Winbond]

/HOLD condition will terminate after the next falling edge of CLK. During a /HOLD condition, the Serial
Data Output (DO) is high impedance, and Serial Data Input (DI) and Serial Clock (CLK) are ignored.
The Chip Select (/CS) signal should be kept active (low) for the full duration of the /HOLD operation to
avoid resetting the internal logic state of the device.
9.2
Applications that use non-volatile memory must take into consideration the possibility of noise and other
adverse system conditions that may compromise data integrity. To address this concern the
W25Q80/16/32 provides several means to protect data from inadvertent writes.
9.2.1
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Upon power-up or at power-down the W25Q80/16/32 will maintain a reset condition while VCC is below
the threshold value of V
operations are disabled and no instructions are recognized. During power-up and after the VCC voltage
exceeds V
This includes the Write Enable, Page Program, Sector Erase, Block Erase, Chip Erase and the Write
Status Register instructions. Note that the chip select pin (/CS) must track the VCC supply level at
power-up until the VCC-min level and t
be used to accomplish this.
After power-up the device is automatically placed in a write-disabled state with the Status Register Write
Enable Latch (WEL) set to a 0. A Write Enable instruction must be issued before a Page Program,
Sector Erase, Chip Erase or Write Status Register instruction will be accepted. After completing a
program, erase or write instruction the Write Enable Latch (WEL) is automatically cleared to a write-
disabled state of 0.
Software controlled write protection is facilitated using the Write Status Register instruction and setting
the Status Register Protect (SRP0, SRP1) and Block Protect (SEC,TB, BP2, BP1 and BP0) bits. These
settings allow a portion or all of the memory to be configured as read only. Used in conjunction with the
Write Protect (/WP) pin, changes to the Status Register can be enabled or disabled under hardware
control. See Status Register for further information. Additionally, the Power-down instruction offers an
extra level of write protection as all instructions are ignored except for the Release Power-down
instruction.
Device resets when VCC is below threshold
Time delay write disable after Power-up
Write enable/disable instructions and automatic write disable after program and erase
Software and Hardware (/WP pin) write protection using Status Register
Write Protection using Power-down instruction
Lock Down write protection until next power-up
One Time Program (OTP) write protection
Note 1: These features are available upon special order. Please contact Winbond for details.
WRITE PROTECTION
Write Protect Features
WI
, all program and erase related instructions are further disabled for a time delay of t
WI
, (See Power-up Timing and Voltage Levels and Figure 29). While reset, all
VSL
time delay is reached. If needed a pull-up resister on /CS can
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W25Q80, W25Q16, W25Q32
Publication Release Date: September 26, 2007
Preliminary - Revision B
PUW
.