NAND04GW3B2AN1F NUMONYX [Numonyx B.V], NAND04GW3B2AN1F Datasheet - Page 13

• Manufacturer Part Number: NAND04GW3B2AN1F
• Description: 4 Gbit, 8 Gbit, 2112 Byte/1056 Word Page 3V, NAND Flash Memories
• Manufacturer: NUMONYX [Numonyx B.V]

NAND04GW3B2B, NAND08GW3B2A
3
3.1
3.2
3.3
3.4
3.5
3.6
Signal descriptions
See
connected to this device.
Inputs/Outputs (I/O0-I/O7)
Input/Outputs 0 to 7 are used to input the selected address, output the data during a Read
operation or input a command or data during a Write operation. The inputs are latched on
the rising edge of Write Enable. I/O0-I/O7 are left floating when the device is deselected or
the outputs are disabled.
Address Latch Enable (AL)
The Address Latch Enable activates the latching of the Address inputs in the Command
Interface. When AL is high, the inputs are latched on the rising edge of Write Enable.
Command Latch Enable (CL)
The Command Latch Enable activates the latching of the Command inputs in the Command
Interface. When CL is high, the inputs are latched on the rising edge of Write Enable.
Chip Enable (E)
The Chip Enable input activates the memory control logic, input buffers, decoders and
sense amplifiers. When Chip Enable is low, V
high, v
mode.
Read Enable (R)
The Read Enable pin, R, controls the sequential data output during Read operations. Data
is valid t
column address counter by one.
Power-Up Read Enable, Lock/Unlock Enable (PRL)
The Power-Up Read Enable, Lock/Unlock Enable input, PRL, is used to enable and disable
the lock mechanism. When PRL is High, V
If the Power-Up Read Enable, Lock/Unlock Enable input is not required, the PRL pin should
be left unconnected (Not Connected) or connected to V
Figure 2: Logic
IH
RLQV
, while the device is busy, the device remains selected and does not go into standby
after the falling edge of R. The falling edge of R also increments the internal
Diagram, and
Table 2: Signal
IH
, the device is in Block Lock mode.
IL
, the device is selected. If Chip Enable goes
Names, for a brief overview of the signals
SS
.
Signal descriptions
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