HYB18T512160AF INFINEON [Infineon Technologies AG], HYB18T512160AF Datasheet - Page 55

• Manufacturer Part Number: HYB18T512160AF
• Description: 512-Mbit DDR2 SDRAM
• Manufacturer: INFINEON [Infineon Technologies AG]

Figure 34
RL = 5, WL = 4, BL = 4
The seamless write operation is supported by enabling a write command every BL/2 number of clocks. This
operation is allowed regardless of same or different banks as long as the banks are activated.
Figure 35
RL = 3, WL = 2, BL = 8, non interrupting
The seamless non interrupting 8-bit write operation is supported by enabling a write command at every BL/2
number of clocks. This operation is allowed regardless of same or different banks as long as the banks are
activated.
Data Sheet
C M D
D Q S ,
D Q S
CMD
DQS,
DQS
C K , C K
D Q
CK, CK
DQ
T0
W R IT E A
Posted CAS
T0
WRITE A
Seamless Write Operation Example 1
Seamless Write Operation Example 2
W L = R L - 1 = 2
T1
T1
N O P
NOP
WL = RL - 1 = 4
DIN A0 DIN A1 DIN A2 DIN A3 DIN A4 DIN A5 DIN A5 DIN A7 DIN B0 DIN B1 DIN B2 DIN B3 DIN B4 DIN B5 DIN
T2
T2
Posted CAS
WRITE B
N O P
T3
T3
N O P
NOP
W R IT E B
DIN A0
T4
T4
55
NOP
DIN A1
HYB18T512[40/80/16]0AF–[3/3S/3.7/5]
DIN A2
T5
T5
N O P
NOP
DIN A3
DIN B0
T6
T6
N O P
NOP
DIN B1
512-Mbit DDR2 SDRAM
T7
DIN B2
T7
N O P
Functional Description
NOP
09112003-SDM9-IQ3P
DIN B3
Rev. 1.3, 2005-01
SBW_BL8
T8
T8
N O P
NOP
SBR