S-93C46BD0I-I8T1G SII [Seiko Instruments Inc], S-93C46BD0I-I8T1G Datasheet - Page 15
S-93C46BD0I-I8T1G
Manufacturer Part Number
S-93C46BD0I-I8T1G
Description
3-WIRE SERIAL E2PROM
Manufacturer
SII [Seiko Instruments Inc]
Datasheet
1.S-93C46BD0I-I8T1G.pdf
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Rev.7.0
4. 3 Erasing data (ERASE)
_00
CS
SK
DO
DI
To erase 16-bit data at a specified address, set all 16 bits of the data to 1, change CS to high, and then
input the ERASE instruction and address following the start bit. There is no need to input data. The data
erase operation starts when CS goes low. If the clocks more than the specified number have been input,
the clock pulse monitoring circuit cancels the ERASE instruction. For details of the clock pulse monitoring
circuit, refer to “ Function to Protect Against Write due to Erroneous Instruction Recognition ”.
CS
SK
DO
DI
1
1
2
1
1
3
1
Figure 14 Data Erase Timing (S-93C56B, S-93C66B)
2
4
1
3
Figure 13 Data Erase Timing (S-93C46B)
A6
5
A5
High-Z
A7: S-93C66B
Seiko Instruments Inc.
4
x : S-93C56B
A5
6
A4
5
High-Z
A4
7
A3
6
A3
8
A2
7
A2
9
A1
8
A1
10
9
11
A0
A0
t
SV
t
CDS
t
SV
t
CDS
3-WIRE SERIAL E
t
PR
t
PR
Verify
busy
S-93C46B/56B/66B
Verify
busy
ready
ready
Standby
High-Z
Standby
High-Z
t
2
HZ1
PROM
t
HZ1
15
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