STK16C88-3_08 SIMTEK [Simtek Corporation], STK16C88-3_08 Datasheet - Page 9

• Manufacturer Part Number: STK16C88-3_08
• Description: 32Kx8 AutoStore+ nvSRAM
• Manufacturer: SIMTEK [Simtek Corporation]

Document Control #ML0019 Rev 2.0
The software sequence must be clocked with E
controlled
Once the sixth address in the sequence has been
entered, the
chip will be disabled. It is important that
cycles and not
sequence, although it is not necessary that G be
low for the sequence to be valid. After the t
cycle time has been fulfilled, the
activated for
SOFTWARE NONVOLATILE RECALL
A software
sequence of
to the software
RECALL
operations must be performed:
Internally,
the
tile information is transferred into the
After the t
be ready for
1. Read address
2. Read address
3. Read address
4. Read address
5. Read address
6. Read address
1. Read address
2. Read address
3. Read address
4. Read address
5. Read address
6. Read address
SRAM
Jan, 2008
50
40
30
20
10
0
cycle, the following sequence of
RECALL
data is cleared, and second, the nonvola-
READ
RECALL
READ
STORE
READ
Figure 2: I
RECALL
READ
cycle time the
s.
50
STORE
WRITE
and
is a two-step procedure. First,
operations in a manner similar
0E38 (hex)
31C7 (hex)
03E0 (hex)
3C1F (hex)
303F (hex)
0FC0 (hex)
0E38 (hex)
31C7 (hex)
03E0 (hex)
3C1F (hex)
303F (hex)
0C63 (hex)
cycle will commence and the
and
Cycle Time (ns)
100
CC
WRITE
cycle is initiated with a
(max) Reads
cycles be used in the
initiation. To initiate the
WRITE
SRAM
150
operation.
SRAM
TTL
CMOS
Valid READ
Valid READ
Valid READ
Valid READ
Valid READ
Initiate STORE cycle
Valid READ
Valid READ
Valid READ
Valid READ
Valid READ
Initiate RECALL cycle
operations. The
will once again
200
will again be
SRAM
READ
READ
cells.
STORE
9
RECALL
nonvolatile storage elements. The nonvolatile data
can be recalled an unlimited number of times.
HARDWARE PROTECT
The
against inadvertent
WRITE
V
WRITE
LOW AVERAGE ACTIVE POWER
The STK16C88-3 draws significantly less current
when it is cycled at rates slower than 35ns. Figure 2
shows the relationship between I
time. Worst-case current consumption is shown for
both
perature range, V
enable). Figure 3 shows the same relationship for
WRITE
than 100%, only standby current is drawn when the
chip is disabled. The overall average current drawn
by the STK16C88-3 depends on the following
items: 1)
cycle of chip enable; 3) the overall cycle rate for
accesses; 4) the ratio of
operating temperature; 6) the V
loading.
SWITCH
CMOS
STK16C88-3
s during low-voltage conditions. When V
s are inhibited.
50
, all software
40
30
20
10
cycles. If the chip enable duty cycle is less
0
operation in no way alters the data in the
CMOS
and
Figure 3: I
50
TTL
CC
vs.
= 3.6V, 100% duty cycle on chip
STORE
STORE
input levels (commercial tem-
TTL
offers
Cycle Time (ns)
CC
100
(max) Writes
READ
input levels; 2) the duty
operations and
hardware
operation and
150
s to
CC
TTL
CMOS
CC
STK16C88-3
level; and 7) I/O
and
WRITE
200
READ
protection
s; 5) the
SRAM
SRAM
cycle
CC
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