M36DR432A100ZA6C STMICROELECTRONICS [STMicroelectronics], M36DR432A100ZA6C Datasheet - Page 17

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M36DR432A100ZA6C

Manufacturer Part Number
M36DR432A100ZA6C
Description
32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 4 Mbit 256K x16 SRAM, Multiple Memory Product
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
Table 17. Status Register Bits
Note: 1. Logic level '1' is High, '0' is Low. -0-1-0-0-0-1-1-1-0- represent bit value in successive Read operations.
DQ
7
6
5
4
3
2
1
0
2. In case of double word program DQ7 refers to the last word input.
Data
Polling
Toggle Bit
Error Bit
Reserved
Erase Time
Bit
Toggle Bit
Reserved
Reserved
Name
'-1-0-1-0-1-0-1-'
'-1-1-1-1-1-1-1-'
'-1-0-1-0-1-0-1-'
Logic Level
DQ
DQ
DQ
DQ
'1'
'0'
'1'
'0'
'1'
'0'
1
(1)
Erase Complete or erase block
in Erase Suspend.
Erase On-going
Program Complete or data of
non erase block during Erase
Suspend.
Program On-going
Erase or Program On-going
Program Complete
Erase Complete or Erase
Suspend on currently addressed
block
Program or Erase Error
Program or Erase On-going
Erase Timeout Period Expired
Erase Timeout Period On-going
Erase Suspend read in the
Erase Suspended Block.
Erase Error due to the currently
addressed block (when DQ5 =
'1').
Program on-going or Erase
Complete.
Erase Suspend read on non
Erase Suspend block.
Definition
(2)
Indicates the P/E.C. status, check
during Program or Erase, and on
completion before checking bits DQ5
for Program or Erase Success.
Successive reads output
complementary data on DQ6 while
Programming or Erase operations are
on-going. DQ6 remains at constant
level when P/E.C. operations are
completed or Erase Suspend is
acknowledged.
This bit is set to '1' in the case of
Programming or Erase failure.
P/E.C. Erase operation has started.
Only possible command entry is Erase
Suspend (ES)
An additional block to be erased in
parallel can be entered to the P/E.C:
Indicates the erase status and allows
to identify the erased block.
M36DR432A, M36DR432B
Note
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