M36DR432A100ZA6C STMICROELECTRONICS [STMicroelectronics], M36DR432A100ZA6C Datasheet - Page 25

• Manufacturer Part Number: M36DR432A100ZA6C
• Description: 32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 4 Mbit 256K x16 SRAM, Multiple Memory Product
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Note: 1.
Table 25. Flash Read AC Characteristics
(TA = –40 to 85°C; V
Note: 1. Sampled only, not 100% tested.
Symbol
t
V
t
t
t
t
t
Symbol
V
V
V
GHQZ
EHQZ
ELQV
ELQX
GLQV
GLQX
t
t
t
t
PPLK
t
t
AVQV1
PPH
LKO
GHQX
PPL
AXQX
EHQX
AVQV
AVAV
2. GF may be delayed by up to t
I
and
(2)
(1)
(1)
(2)
(1)
DDES
(1)
Program Voltage
(Program or
Erase operations)
Program Voltage
(Program or
Erase operations)
Program Voltage
(Program and
Erase lock-out)
V
Voltage (Program
and Erase lock-
out)
I
DDR.
DDF
and
t
Parameter
t
PAGE
t
t
t
t
Alt
t
ACC
t
t
t
t
t
OLZ
RC
OH
OH
OH
OE
HZ
CE
DF
LZ
Supply
If the device is read while in program suspend, current draw is the sum of
I
DDWS
Address Valid to Next Address
Valid
Address Valid to Output Valid
(Random)
Address Valid to Output Valid
(Page)
Address Transition to Output
Transition
Chip Enable High to Output
Transition
Chip Enable High to Output Hi-Z
Chip Enable Low to Output Valid
Chip Enable Low to Output
Transition
Output Enable High to Output
Transition
Output Enable High to Output
Hi-Z
Output Enable Low to Output
Valid
Output Enable Low to Output
Transition
DDF
are specified with device deselected. If device is read while in erase suspend, current draw is sum of
= 1.65V to 2.2V)
Device
Flash
Flash
Flash
Flash
Parameter
ELQV
- t
GLQV
after the falling edge of EF without increasing t
Test Condition
EF = V
EF = V
EF = V
EF = V
Test Condition
GF = V
GF = V
GF = V
GF = V
EF = V
EF = V
EF = V
EF = V
IL
IL
IL
IL
, GF = V
, GF = V
, GF = V
, GF = V
IL
IL
IL
IL
IL
IL
IL
IL
IL
IL
IL
IL
I
Min
100
DDWS
0
0
0
0
0
M36DR432A, M36DR432B
ELQV
100
1.65
11.4
Min
and
Max
100
100
35
25
25
25
I
DDR
Flash
Typ
.
Min
120
0
0
0
0
0
120
Max
Max
12.6
120
120
3.6
45
35
35
35
1
2
Unit
I
25/46
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DDES
V
V
V
V