M36DR432A100ZA6C STMICROELECTRONICS [STMicroelectronics], M36DR432A100ZA6C Datasheet - Page 6

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M36DR432A100ZA6C

Manufacturer Part Number
M36DR432A100ZA6C
Description
32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 4 Mbit 256K x16 SRAM, Multiple Memory Product
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
M36DR432A, M36DR432B
Table 3. Main Operation Modes
Note: X = V
6/46
Operation
Block
Locking
Standby
Output
Disable
Read
Write
Standby/
Power
Down
Data
Retention
Output
Disable
1. If UBS and LBS are tied together the bus is at 16 bit. For an 8 bit bus configuration use UBS and LBS separately.
Mode
Read
Write
Reset
IL
or V
IH
, V
V
V
V
V
V
EF
PPFH
X
IH
IL
IL
IL
IL
= 12V ± 5%.
V
V
GF
V
X
X
X
Any Flash mode is allowable
Any Flash mode is allowable
Any Flash mode is allowable
IH
IH
IL
Flash must be disabled
Flash must be disabled
WF
V
V
V
X
X
X
IH
IH
IL
RPF
V
V
V
V
V
V
IH
IH
IH
IH
IH
IL
WPF
V
V
X
X
X
X
IH
IL
Don't care
Don't care
Don't care
Don't care
Don't care
V
V
V
CCF
PPFH
PPF
or
E1S E2S
V
V
V
V
V
X
X
X
X
IH
IH
IL
IL
IL
Any SRAM mode is allowable
Any SRAM mode is allowable
Any SRAM mode is allowable
V
V
V
V
V
SRAM must be disabled
SRAM must be disabled
SRAM must be disabled
X
X
X
X
IH
IH
IH
IL
IL
GS
V
V
V
X
X
X
X
X
X
IH
IH
IL
WS
V
V
V
X
X
X
X
X
X
IH
IH
IL
UBS, LBS
V
V
V
V
X
X
X
X
X
IH
IH
IL
IL
(1)
DQ15-DQ0
Word Read
Word Write
Data Input
Data out
Data in
Output
Data
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
X

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