NCP1573D ONSEMI [ON Semiconductor], NCP1573D Datasheet

no-image

NCP1573D

Manufacturer Part Number
NCP1573D
Description
Low Voltage Synchronous Buck Controller
Manufacturer
ONSEMI [ON Semiconductor]
Datasheet
NCP1573
Low Voltage Synchronous
Buck Controller
control for a DC−DC power solution producing an output voltage as
low as 0.980 V over a wide current range. The NCP1573−based
solution is powered from 12 V with the output derived from a 2−7 V
supply. It contains all required circuitry for a synchronous NFET buck
regulator using the V
transient response and best overall regulation. NCP1573 operates at a
fixed internal 200 kHz frequency and is packaged in an SO−8.
non−overlap.
Features
© Semiconductor Components Industries, LLC, 2006
July, 2006 − Rev. 4
The NCP1573 is a low voltage buck controller. It provides the
This device provides Power Good with delay and built−in adaptive
0.980 V ± 1.0% Reference Voltage
V
200 ns Transient Response
Power Good
Programmable Power Good Delay
40 ns Gate Rise and Fall Times (3.3 nF Load)
Adaptive FET Non−Overlap Time
Fixed 200 kHz Oscillator Frequency
On/Off Control Through Use of the COMP Pin
Overvoltage Protection through Synchronous MOSFETs
Synchronous N−Channel Buck Design
Dual Supply, 12 V Control, 2−7 V Power Source
2
Control Topology
2
™ control method to achieve the fastest possible
1
NCP1573D
NCP1573DR2
Device
PGDELAY
PWRGD
ORDERING INFORMATION
COMP
PIN CONNECTIONS AND
V
MARKING DIAGRAM
A
L
Y
W = Work Week
CC
http://onsemi.com
1
= Assembly Location
= Wafer Lot
= Year
CASE 751
D SUFFIX
Package
8
SO−8
SO−8
SO−8
Publication Order Number
1
8
2500 Tape & Reel
GND
V
GATE(L)
GATE(H)
98 Units/Rail
FB
Shipping
NCP1573/D

Related parts for NCP1573D

NCP1573D Summary of contents

Page 1

... CASE 751 PIN CONNECTIONS AND MARKING DIAGRAM PWRGD PGDELAY COMP A = Assembly Location L = Wafer Lot Y = Year W = Work Week ORDERING INFORMATION Device Package NCP1573D SO−8 NCP1573DR2 SO− GND V FB GATE(L) GATE(H) Shipping 98 Units/Rail 2500 Tape & Reel Publication Order Number NCP1573/D ...

Page 2

V PWRGD V LOGIC 0.47 μ PWRGD NCP1573 PGDELAY GATE(L) COMP GATE(H) C12 0.01 μF C13 0.1 μF MAXIMUM RATINGS* Operating Junction Temperature Storage Temperature Range ESD Susceptibility (Human Body Model) ...

Page 3

ELECTRICAL CHARACTERISTICS C = 0.01 μ 0.1 μF; unless otherwise specified.) PGDELAY COMP Characteristic Error Amplifier V Bias Current FB COMP Source Current COMP Sink Current Reference Voltage COMP Max Voltage COMP Min Voltage Open Loop Gain Unity ...

Page 4

ELECTRICAL CHARACTERISTICS (continued 0.01 μ 0.1 μF; unless otherwise specified.) PGDELAY COMP Characteristic PWM Comparator PWM Comparator Offset Ramp Max Duty Cycle Artificial Ramp Transient Response V Input Range FB Oscillator Switching Frequency General Electrical Specifications ...

Page 5

GND Error Amp V − 0.980 V − COMP 0.525 V − + Σ Art Ramp 80%, 200 kHz PGDELAY Latch − 0.88 V/0.69 V − R Set Dominant PWM Latch PWM COMP − ...

Page 6

TYPICAL PERFORMANCE CHARACTERISTICS Temperature (°C) Figure 3. Supply Current vs. Temperature 0.984 0.983 0.982 0.981 0.980 0.979 0.978 0.977 0.976 Temperature (°C) Figure 5. Reference Voltage ...

Page 7

TYPICAL PERFORMANCE CHARACTERISTICS Source Current Temperature (°C) Figure 9. Error Amp Output Currents vs. Temperature 38 GATEH Fall Time 36 GATEH Rise Time GATEL ...

Page 8

TYPICAL PERFORMANCE CHARACTERISTICS 13.4 13.1 12.8 12.5 12.2 11.9 11 Temperature (°C) Figure 15. PGDELAY Charge Current vs. Temperature 259 257 255 253 251 Temperature (°C) Figure 17. PGDELAY Discharge Threshold Voltage ...

Page 9

THEORY OF OPERATION The NCP1573 is a simple, synchronous, fixed−frequency, low−voltage buck controller using the V provides a programmable−delay Power Good function to indicate when the output voltage is out of regulation Control Method 2 The V control ...

Page 10

This slope compensation increases the noise immunity, particularly at duty cycles above 50%. Start Up The NCP1573 features a programmable Soft Start function, which is implemented through ...

Page 11

OUT = load transient; ΔI OUT Δt = load transient duration time; ESL = Maximum allowable ESL including capacitors, circuit traces, and vias; ESR = Maximum allowable ESR including capacitors and ...

Page 12

OUT ) V OUT I RIPPLE + ( f OSC )( Peak inductor current is defined as the load current plus half of the peak current. Peak current must be ...

Page 13

I IN(AVE) + (10 A)(3 6.6 A Input capacitor RMS ripple current is then 6 3 IN(RMS 6 6 ...

Page 14

OUT )(V OUT ) I RIPPLE + (f OSC )(L)( OUT I RIPPLE I PEAK + I LOAD ) + 2 where Duty cycle. For switching power losses ...

Page 15

Providing fast turn−on and turn−off edges to the IC power is very important in minimizing glitching because there is no undervoltage lockout circuitry. For example, if the switcher were powered up and regulating, and the supply began to decrease slowly, ...

Page 16

Layout Considerations 2 1. The fast response time of V technology increases the IC’s sensitivity to noise on the V Fortunately, a simple RC filter, formed by the feedback network and a small capacitor (100 pF works well, shown below ...

Page 17

−Y− G −Z− 0.25 (0.010 trademark of Switch Power, Inc. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves ...

Related keywords