X9521 XICOR [Xicor Inc.], X9521 Datasheet

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X9521

Manufacturer Part Number
X9521
Description
Dual DCP, EEPROM Memory
Manufacturer
XICOR [Xicor Inc.]
Datasheet
FEATURES
• Two Digitally Controlled Potentiometers (DCP’s)
• 2 kbit EEPROM Memory with Write Protect & Block
• 2-Wire industry standard Serial Interface
• Single Supply Operation
• Hot Pluggable
• Packages
BLOCK DIAGRAM
©2000 Xicor Inc., Patents Pending
REV 1.1.9 1/30/03
—100 Tap - 10k Ω
—256 Tap - 100k Ω
—Non-Volatile
—Write Protect Function
Lock
—Complies to the Gigabit Interface Converter (GBIC)
—2.7V to 5.5V
—CSP (Chip Scale Package)
—20 Pin TSSOP
specification
TM
SDA
SCL
WP
Preliminary Information
Fiber Channel / Gigabit Ethernet Laser Diode Control for Fiber Optic Modules
RESET LOGIC
THRESHOLD
COMMAND
DECODE &
REGISTER
CONTROL
LOGIC
DATA
8
4
www.xicor.com
PROTECT LOGIC
REGISTER
CONSTAT
EEPROM
ARRAY
2 kbit
DESCRIPTION
The X9521 combines two Digitally Controlled Potentiome-
ters (DCP’s), and integrated EEPROM with Block Lock
protection. All functions of the X9521 are accessed by an
industry standard 2-Wire serial interface.
The DCP’s of the X9521 may be utilized to control the bias
and modulation currents of the laser diode in a Fiber Optic
module. The 2 kbit integrated EEPROM may be used to
store module definition data.
The features of the X9521 are ideally suited to simplifying
the design of fiber optic modules which comply to the Giga-
bit Interface Converter (GBIC) specification. The integration
of these functions into one package significantly reduces
board area, cost and increases reliability of laser diode
modules.
Characteristics subject to change without notice.
Dual DCP, EEPROM Memory
NONVOLATILE
MEMORY
NONVOLATILE
COUNTER
REGISTER
REGISTER
COUNTER
MEMORY
8 - BIT
WIPER
WIPER
7 - BIT
Hot Pluggable
X9521
R
R
R
R
R
R
H2
W2
L2
H1
W1
L1
1 of 26
TM

Related parts for X9521

X9521 Summary of contents

Page 1

... EEPROM with Block Lock protection. All functions of the X9521 are accessed by an industry standard 2-Wire serial interface. The DCP’s of the X9521 may be utilized to control the bias and modulation currents of the laser diode in a Fiber Optic module. The 2 kbit integrated EEPROM may be used to store module defi ...

Page 2

... X9521 – Preliminary Information PIN CONFIGURATION 20 Pin TSSOP Vcc SCL SDA PIN ASSIGNMENT Pin CSP Name Connection to end of resistor array for (the 256 Tap) DCP 2. ...

Page 3

... Data states on the SDA line can change only while SCL is LOW. SDA state changes while SCL is HIGH are reserved for indicating START and STOP conditions. See Figure 1. On power up of the X9521, the SDA pin is in the input mode. Serial Start Condition ...

Page 4

... All operations however must begin with the Slave Address Byte being issued on the SDA pin. The Slave address selects the part of the X9521 to be addressed, and speci- fi Read or Write operation performed. It should be noted that in order to perform a write opera- tion to either a DCP or the EEPROM array, the Write Enable Latch (WEL) bit must fi ...

Page 5

... These switches are controlled by the Wiper Counter Register (WCR) (See Figure 6). The WCR is a volatile register. On power up of the X9521, wiper position data is auto- NO matically loaded into the WCR from its associated Non Issue STOP Volatile Memory (NVM) Register. The Table below shows the Initial Values of the DCP WCR’ ...

Page 6

... Hot Pluggability Figure 7 shows a typical waveform that the X9521 might experience in a Hot Pluggable situation. On power up, Vcc applied to the X9521 may exhibit some amount of ringing, before it settles to the required value. The device is designed such that the wiper terminal (R is recalled to the correct position (as per the last stored in ...

Page 7

... Figure 8. Instruction Byte Format and NVM. Therefore, the new “wiper position” setting is recalled into the WCR after Vcc of the X9521 has been powered down then powered back “0” then a DCP Volatile Write is performed. This operation changes the DCP “wiper position” by writing new data to the associated WCR only ...

Page 8

... Data Byte (binary) for DCP1, is given in “APPENDIX 2” should be noted that all writes to any DCP of the X9521 are random in nature. Therefore, the Data Byte of consec- utive write operations to any DCP can differ by an arbi- trary number of bits ...

Page 9

... CONSTAT Register must first be set (See “BL1, BL0: Block Lock protection bits - (Nonvolatile)” on page 12.) The X9521 is capable of a page write operation initi- ated in the same manner as the byte write operation; but instead of terminating the write cycle after the first data byte is transferred, the master can transmit an unlimited number of 8-bit bytes ...

Page 10

... Slave Figure 14. Current EEPROM Address Read Sequence The master terminates the Data Byte loading by issuing a STOP condition, which causes the X9521 to begin the nonvolatile write cycle. As with the byte write operation, all inputs are disabled until completion of the internal write cycle ...

Page 11

... Byte, the master immediately issues another START con- dition and the Slave Address Byte with the R/W bit set to one. This is followed by an ACKNOWLEDGE from the X9521 and then by the eight bit word. The master termi- nates the read operation by not responding with an ACKNOWLEDGE and instead issuing a STOP condition (Refer to Figure 15.). A similar operation called “ ...

Page 12

... RWEL: Register Write Enable Latch (Volatile) The RWEL bit controls the (CONSTAT) Register Write Enable status of the X9521. Therefore, in order to write to any of the bits of the CONSTAT Register (except WEL), the RWEL bit must first be set to “1”. The RWEL bit is a volatile bit that powers up in the disabled, LOW (“0”) state. ...

Page 13

... CONSTAT register Write operation. The user must issue a STOP , after sending this byte to the register, to initiate the nonvol- atile cycle that stores the BP1and BP0 bits. The X9521 Partition of array will not ACKNOWLEDGE any data bytes written after the locked fi ...

Page 14

... RWEL bit. Block Lock protection of the device enables the user to inhibit writes to certain regions of the EEPROM memory, as well as to all the DCPs. One further level of data protection in the X9521, is incorpo- rated in the form of the Write Protection pin. WP: Write Protection Pin When the Write Protection (WP) pin is active (HIGH), it disables nonvolatile write operations to the X9521 ...

Page 15

... X9521 – Preliminary Information ABSOLUTE MAXIMUM RATINGS Temperature under Bias Storage Temperature Voltage on WP pin (With respect to Vss) Voltage on other pins (With respect to Vss) | Voltage on R – Voltage D.C. Output Current (SDA) Lead Temperature (Soldering, 10 seconds) Supply Voltage Limits (Applied Vcc voltage, referenced to Vss) ...

Page 16

... X9521 – Preliminary Information TIMING DIAGRAMS Figure 22. Bus Timing t F SCL t SU:DAT t SU:STA t HD:STA SDA IN SDA OUT Figure 23. WP Pin Timing START SCL SDA IN WP Figure 24. Write Cycle Timing SCL SDA 8th bit of last byte REV 1.1.9 1/30/ HIGH LOW R t HD:DAT ...

Page 17

... X9521 – Preliminary Information Figure 25. DCP “Wiper Position” Timing Rwx (x=1,2) R wx( tap position SCL SDA SLAVE ADDRESS BYTE T REV 1.1.9 1/30/ INSTRUCTION BYTE www.xicor.com R wx(n+1) R wx(n-1) Time ...

Page 18

... X9521 – Preliminary Information D.C. OPERATING CHARACTERISTICS Symbol Parameter Current into V Pin CC (1) I CC1 Read memory array Write nonvolatile memory Current into V Pin CC (2) I CC2 With 2-Wire bus activity No 2-Wire bus activity Input Leakage Current (SCL, SDA Input Leakage Current (WP) ...

Page 19

... X9521 – Preliminary Information A.C. CHARACTERISTICS (See Figure 22, Figure 23, Figure 24) Symbol f SCL Clock Frequency SCL (5) t Pulse width Suppression Time at inputs IN t (5) SCL LOW to SDA Data Out Valid AA t (5) Time the bus free before start of new transmission BUF t Clock LOW Time LOW ...

Page 20

... X9521 – Preliminary Information POTENTIOMETER CHARACTERISTICS Symbol Parameter R End to End Resistance Tolerance TOL V R Terminal Voltage (x=1,2) RHx Terminal Voltage (x=1,2) RLx L P (1) Power Rating ( DCP Wiper Resistance W I Wiper Current (6) W Noise (2) Absolute Linearity (3) Relative Linearity R Temperature Coefficient TOTAL ...

Page 21

... X9521 – Preliminary Information 20-Bump Chip Scale Package (CSP B20) Package Outline Drawing Top View (Marking Side) Package Dimensions Symbol Package Width a Package Length b Package Height c Body Thickness d Ball Height e Ball Diameter f Ball Pitch – Width j Ball Pitch – Length k Ball to Edge Spacing – Width l Ball to Edge Spacing – ...

Page 22

... X9521 – Preliminary Information APPENDIX 1 DCP1 (100 Tap) Tap position to Data Byte translation Table Tap Position Decimal 120 76 119 . . . . REV 1.1.9 1/30/03 Data Byte Binary 0000 0000 0000 0001 ...

Page 23

... X9521 – Preliminary Information APPENDIX 2 DCP1 (100 Tap) tap position to Data Byte translation algorithm example. (Example 1) unsigned DCP1_TAP_Position(int tap_pos) { int block; int i; int offset; int wcr_val; offset= 0; block = tap_pos / 25; if (block < 0) return ((unsigned)0); else if (block < switch(block) { case (0): return ((unsigned)tap_pos) ; ...

Page 24

... X9521 – Preliminary Information APPENDIX 2 DCP1 (100 Tap) tap position to Data Byte translation algorithm example. (Example 2) unsigned DCP100_TAP_Position(int tap_pos optional range checking */ if (tap_pos < 0) return ((unsigned)0); else if (tap_pos >99) return ((unsigned) 96); /* 100 Tap DCP encoding formula */ if (tap_pos > 74) return ((unsigned) (195 - tap_pos)); ...

Page 25

... X9521 – Preliminary Information .025 (.65) BSC .252 (6.4) .260 (6.6) .0075 (.19) .0118 (.30) 0° – 8° .019 (.50) .029 (.75) Detail A (20X) See Detail “A” NOTE: ALL DIMENSIONS IN INCHES (IN P ARENTHESES IN MILLIMETERS) REV 1.1.9 1/30/03 20-LEAD PLASTIC, TSSOP PACKAGE TYPE V .169 (4.3) .252 (6.4) BSC .177 (4.5) .047 (1.20) .002 (.05) ...

Page 26

... X9521 – Preliminary Information ORDERING INFORMATION Device LIMITED WARRANTY Devices sold by Xicor, Inc. are covered by the warranty and patent indemnification provisions appearing in its Terms of Sale only. Xicor, Inc. makes no warranty, express, statutory, implied description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. ...

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