X9521 XICOR [Xicor Inc.], X9521 Datasheet - Page 14

• Manufacturer Part Number: X9521
• Description: Dual DCP, EEPROM Memory
• Manufacturer: XICOR [Xicor Inc.]

X9521 – Preliminary Information
X9521 Write Permission Status
REV 1.1.9 1/30/03
For example, a sequence of writes to the device CON-
STAT register consisting of [02H, 06H, 02H] will reset the
BL0 and BL0 bits in the CONSTAT Register to “0”.
It should be noted that a write to any nonvolatile bit of
CONSTAT register will be ignored if the Write Protect pin
of the X9521 is active (HIGH) (See "WP: Write Protection
Pin").
CONSTAT Register Read Operation
The contents of the CONSTAT Register can be read at
any time by performing a random read (See Figure 19).
Using the Slave Address Byte set to 10100101, and an
Address Byte of FFh. Only one byte is read by each regis-
ter read operation. The X9521 resets itself after the first
byte is read. The master should supply a STOP condition
to be consistent with the bus protocol.
After setting the WEL and / or the RWEL bit(s) to a “1”, a
CONSTAT register read operation may occur, without
interrupting a proceeding CONSTAT register write opera-
tion.
When reading the contents of the CONSTAT register, the
bits CS7-CS5 and CS0 will always return “0”.
Block Lock
BL0
x
1
0
x
1
0
Bits
BL1
1
x
0
1
x
0
Signals from
the Master
Signals from
the Slave
SDA Bus
WP
0
0
0
1
1
1
DCP Volatile Write
Permitted
Figure 19. CONSTAT Register Read Command Sequence
YES
YES
NO
NO
NO
NO
S
a
t
r
t
1
0 1 0 0 1 0
Address
Slave
“Dummy” Write
DCP Nonvolatile
Write Permitted
0
A
C
K
WRITE Operation
YES
NO
NO
NO
NO
NO
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Address
Byte
DATA PROTECTION
There are a number of levels of data protection features
designed into the X9521. Any write to the device first
requires setting of the WEL bit in the CONSTAT register.
A write to the CONSTAT register itself, further requires the
setting of the RWEL bit. Block Lock protection of the
device enables the user to inhibit writes to certain regions
of the EEPROM memory, as well as to all the DCPs. One
further level of data protection in the X9521, is incorpo-
rated in the form of the Write Protection pin.
WP: Write Protection Pin
When the Write Protection (WP) pin is active (HIGH), it
disables nonvolatile write operations to the X9521.
The table below (X9521 Write Permission Status) sum-
marizes the effect of the WP pin (and Block Lock), on the
write permission status of the device.
Additional Data Protection Features
In addition to the preceding features, the X9521 also
incorporates the following data protection functionality:
—The proper clock count and data bit sequence is
A
C
K
Not in locked region
Not in locked region
required prior to the STOP bit in order to start a nonvol-
atile write cycle.
Write to EEPROM
S
a
r
t
t
Yes (All Array)
1 0 1 0 0 1 0
Permitted
Address
Slave
NO
NO
NO
Characteristics subject to change without notice.
1
READ Operation
C
A
K
CS7 … CS0
Volatile Bits
Write to CONSTAT Register
Data
YES
YES
YES
NO
NO
NO
Permitted
S
o
p
t
Nonvolatile
YES
YES
YES
Bits
NO
NO
NO
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