STM8S105C4B3 STMICROELECTRONICS [STMicroelectronics], STM8S105C4B3 Datasheet - Page 50
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STM8S105C4B3
Manufacturer Part Number
STM8S105C4B3
Description
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.STM8S105C4B3.pdf
(127 pages)
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Interrupt vector mapping
7
50/127
Interrupt vector mapping
IRQ
no.
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Source
block
RESET
TRAP
TLI
AWU
CLK
EXTI0
EXTI1
EXTI2
EXTI3
EXTI4
SPI
TIM1
TIM1
TIM
TIM
Description
Reset
Software interrupt
External top level interrupt
Auto wake up from halt
Clock controller
Port A external interrupts
Port B external interrupts
Port C external interrupts
Port D external interrupts
Port E external interrupts
Reserved
End of transfer
TIM1 update/ overflow/
underflow/ trigger/ break
TIM1 capture/ compare
TIM update/ overflow
TIM capture/ compare
DocID14771 Rev 9
Table 11: Interrupt mapping
Wakeup
from halt
mode
Yes
-
-
-
-
Yes
Yes
Yes
Yes
Yes
-
Yes
-
-
-
-
(1)
Wakeup from
active-halt
mode
Yes
-
-
Yes
-
Yes
Yes
Yes
Yes
Yes
-
Yes
-
-
-
-
(1)
Vector
address
STM8S105xx
0x00 8000
0x00 8004
0x00 8008
0x00 800C
0x00 8010
0x00 8014
0x00 8018
0x00 801C
0x00 8020
0x00 8024
0x00 8028
0x00 802C
0x00 8030
0x00 8034
0x00 8038
0x00 803C
0x00 8040
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