EL7554IREZT13 INTERSIL [Intersil Corporation], EL7554IREZT13 Datasheet
EL7554IREZT13
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EL7554IREZT13 Summary of contents
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Data Sheet Monolithic 4 Amp DC-DC Step-Down Regulator The EL7554 is a full-feature synchronous 4A step-down regulator capable 96% efficiency. This device operates from input supply. With internal IN CMOS power FETs, ...
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Typical Application Diagram R 2 10. 12.7K V OUT (1.8V, 4A) 47µF 2 EL7554 COMP SGND 28 220pF 0.018µF 2.32K 2 VREF COSC 27 0.018µ STN STP ...
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Absolute Maximum Ratings ( SGND -0.3V to +6.5V IN ...
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DC Electrical Specifications V PARAMETER DESCRIPTION V EN Input High Level EN_HI V EN Input Low Level EN_LO I Enable Pull-up Current EN TM, S Input High Level EL_HI TM, S Input Low Level EL_LO Pin Descriptions PIN NUMBER PIN ...
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Block Diagram V TJ JUNCTION TEMPERATURE V DD 2.2nF EN STP POWER TRACKING STN EA COMP SGND 5 EL7554 TM 0.018µF 220pF SEL V C REF OSC VOLTAGE OSCILLATOR REFERENCE PWM CONTROLLER DRIVERS CURRENT SENSE V ...
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Typical Performance Curves 3.3V 1.8V 4A 2.2µ =3.3V O 0.95 0.9 0.85 V =0.8V O 0.8 V = 0.7 ...
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Typical Performance Curves 3.3V 1.8V 4A 2.2µ 610 605 V =5V IN 600 595 V =3.3V 590 IN 585 0 0 ...
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Waveforms 3.3V 1.8V 4A 2.2µ 0.5ms/DIV FIGURE 12. START-UP 50µs/DIV FIGURE 14. SHUT-DOWN 1ms/DIV FIGURE 16. VOLTAGE MARGINING 8 EL7554 = 2x10µ 47µF, ...
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Waveforms (Continued 3.3V 1.8V 4A 2.2µ 100µ 150µF OUT 2ms/DIV FIGURE 18. ADJUSTABLE START-UP Detailed Description The EL7554 is a ...
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PFET switch, achieving V close The maximum achievable × – DSON1 O Where R is the ...
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Figure 18 shows the waveforms. C 0.1µF STN - + STP 200K EL7554 V IN FIGURE 21. ADJUSTABLE START-UP In this application, C and C may be increased to IN OUT reduce input/output ripple because the pulse ...
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ESR to satisfy the output ripple ∆V requirement: O ∆V ∆I × ESR = O L When output has a step load change ∆I drop is ESR*∆I . Then V will drop even further before the ...
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Thermal Management The EL7554IRE is packaged in a thermally-efficient HTSSOP-28 package, which utilizes the exposed thermal pad at the bottom to spread heat through PCB metal. Therefore: 1. The thermal pad must be soldered to the PCB 2. Maximize the ...
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Package Outline Drawing NOTE: The package drawing shown here may not be the latest version. To check the latest revision, please refer to the Intersil website at http://www.intersil.com/design/packages/index.asp All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality ...