LM95172QA2MDA NSC [National Semiconductor], LM95172QA2MDA Datasheet - Page 19
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LM95172QA2MDA
Manufacturer Part Number
LM95172QA2MDA
Description
Manufacturer
NSC [National Semiconductor]
Datasheet
1.LM95172QA2MDA.pdf
(24 pages)
1.8 NOISE IMMUNITY OF THE SERIAL I/O (SI/O) AND
SERIAL CLOCK (SC) LINES
The LM95172Q's Serial I/O and Serial Clock lines have high
noise immunity making it an excellent choice in challenging
electromagnetic environments.
Some typical bench tests, taken at room temperature, were
done to show the noise immunity in the case of an injected
sinewave signal used to simulate an interfering noise signal.
Figure 13 below shows the Test Setup used for the bench
test. A function generator was used to create the noise signal.
I the first test this signal was AC-coupled to the SI/O line
through a 1 nF capacitor. The amplitude of the signal from the
generator was adjusted so that the peak-to-peak voltage at
the pad was 400 mVpp, the maximum that is compatible with
the Absolute Maximum requirements.
FIGURE 13. Test Setup for Noise Immunity Test
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Figure 14 below shows the combined waveform for the Serial
digital and injected noise signals.
The LM95172Q's temperature output was read continuously
while the noise signal was injected on the serial I/O line. The
frequency was increased from 1 to 20 MHz in 1 MHz steps.
In the same manner, the Serial Clock (SC) line was tested by
injecting a 400 mVpp sinusoidal signal at the serial clock pad
and monitoring the continuously reading the LM95172Q tem-
perature.
The Result: No temperature change resulted from the inter-
fering signal.
FIGURE 14. Typical Waveforms for Noise Immunity Test
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